MC9S12KG128_10 Datasheet, PDF (349/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 10 Serial Communications Interface (S12SCIV2) Block Description
Table 10-11. Start Bit Verification
RT3, RT5, and RT7 Samples
100
101
110
111
Start Bit Verification
Yes
No
No
No
Noise Flag
1
0
0
0
If start bit verification is not successful, the RT clock is reset and a new search for a start bit begins.
To determine the value of a data bit and to detect noise, recovery logic takes samples at RT8, RT9, and
RT10. Table 10-12 summarizes the results of the data bit samples.
Table 10-12. Data Bit Recovery
RT8, RT9, and RT10 Samples
000
001
010
011
100
101
110
111
Data Bit Determination
0
0
0
1
0
1
1
1
Noise Flag
0
1
1
1
1
1
1
0
NOTE
The RT8, RT9, and RT10 samples do not affect start bit verification. If any
or all of the RT8, RT9, and RT10 start bit samples are logic 1s following a
successful start bit verification, the noise flag (NF) is set and the receiver
assumes that the bit is a start bit (logic 0).
To verify a stop bit and to detect noise, recovery logic takes samples at RT8, RT9, and RT10. Table 10-13
summarizes the results of the stop bit samples.
Table 10-13. Stop Bit Recovery
RT8, RT9, and RT10 Samples Framing Error Flag
Noise Flag
000
1
0
001
1
1
010
1
1
011
0
1
100
1
1
101
0
1
110
0
1
111
0
0
MC9S12KG128 Data Sheet, Rev. 1.16
Freescale Semiconductor
349