MC9S12KG128_10 Datasheet, PDF (253/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 8 Inter-Integrated Circuit (IICV2) Block Description
8.3.2 Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
Register
Name
0x0000
IBAD
Bit 7
R
ADR7
W
6
ADR6
5
ADR5
4
ADR4
3
ADR3
2
ADR2
1
ADR1
Bit 0
0
0x0001
IBFD
R
IBC7
W
IBC6
IBC5
IBC4
IBC3
IBC2
IBC1
IBC0
0x0002
IBCR
R
IBEN
W
0
IBIE
MS/SL
Tx/Rx
TXAK
RSTA
0
IBSWAI
0x0003
R TCF
IAAS
IBB
0
SRW
RXAK
IBSR
W
IBAL
IBIF
0x0004
R
IBDR
D7
W
D6
D5
D4
D3
D2
D1
D0
= Unimplemented or Reserved
Figure 8-2. IIC Register Summary
8.3.2.1 IIC Address Register (IBAD)
Offset Module Base +0x0000
7
6
5
4
3
2
1
0
R
0
ADR7
ADR6
ADR5
ADR4
ADR3
ADR2
ADR1
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 8-3. IIC Bus Address Register (IBAD)
Read and write anytime
This register contains the address the IIC bus will respond to when addressed as a slave; note that it is not
the address sent on the bus during the address transfer.
MC9S12KG128 Data Sheet, Rev. 1.16
Freescale Semiconductor
253