MC9S12KG128_10 Datasheet, PDF (305/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 9 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Module Base + 0x00X1
7
6
5
4
3
2
1
0
R
ID2
ID1
ID0
RTR
IDE (=0)
W
Reset:
x
x
x
x
x
x
x
x
= Unused; always read ‘x’
Figure 9-30. Identifier Register 1 — Standard Mapping
Field
7:5
ID[2:0]
4
RTR
3
IDE
Table 9-29. IDR1 Register Field Descriptions
Description
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in Table 9-28.
Remote Transmission Request — This flag reflects the status of the Remote Transmission Request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
Module Base + 0x00X2
7
6
5
4
3
2
1
0
R
W
Reset:
x
x
x
x
x
x
x
x
= Unused; always read ‘x’
Figure 9-31. Identifier Register 2 — Standard Mapping
MC9S12KG128 Data Sheet, Rev. 1.16
Freescale Semiconductor
305