MC9S12KG128_10 Datasheet, PDF (495/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 16 Debug Module (DBGV1) Block Description
16.3.2.11 Debug Comparator B Extended Register (DBGCBX)
Module Base + 0x002D
7
6
5
4
3
2
1
0
R
PAGSEL
W
EXTCMP
Reset
0
0
0
0
0
0
0
0
Figure 16-19. Debug Comparator B Extended Register (DBGCBX)
Table 16-22. DBGCBX Field Descriptions
Field
Description
7:6
PAGSEL
5:0
EXTCMP
Page Selector Field — If DBGEN is set in DBGC1, then PAGSEL selects the type of paging as shown in
Table 16-11.
DPAGE and EPAGE are not yet implemented so the value in bit 7 will be ignored (i.e., PAGSEL values of 10 and
11 will be interpreted as values of 00 and 01, respectively.)
In BKP mode, PAGSEL has no meaning and EXTCMP[5:0] are compared to address bits [19:14] if the address
is in the FLASH/ROM memory space.
Comparator B Extended Compare Bits — The EXTCMP bits are used as comparison address bits as shown
in Table 16-11 along with the appropriate PPAGE, DPAGE, or EPAGE signal from the core. Also see Table 16-20.
16.3.2.12 Debug Comparator B Register (DBGCB)
Module Base + 0x002E
Starting address location affected by INITRG register setting.
15
R
Bit 15
W
14
Bit 14
13
Bit 13
12
Bit 12
11
Bit 11
10
Bit 10
9
Bit 9
8
Bit 8
Reset
0
0
0
0
0
0
0
0
Figure 16-20. Debug Comparator B Register High (DBGCBH)
MC9S12KG128 Data Sheet, Rev. 1.16
Freescale Semiconductor
495