MC9S12KG128_10 Datasheet, PDF (562/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 19 Module Mapping Control (MMCV4) Block Description
During the execution of an RTC instruction, the CPU:
• Pulls the old PPAGE value from the stack
• Pulls the 16-bit return address from the stack and loads it into the PC
• Writes the old PPAGE value into the PPAGE register
• Refills the queue and resumes execution at the return address
This sequence is uninterruptable; an RTC can be executed from anywhere in memory, even from a different
page of extended memory in the expansion window.
The CALL and RTC instructions behave like JSR and RTS, except they use more execution cycles.
Therefore, routinely substituting CALL/RTC for JSR/RTS is not recommended. JSR and RTS can be used
to access subroutines that are on the same page in expanded memory. However, a subroutine in expanded
memory that can be called from other pages must be terminated with an RTC. And the RTC unstacks a
PPAGE value. So any access to the subroutine, even from the same page, must use a CALL instruction so
that the correct PPAGE value is in the stack.
19.4.3.2 Extended Address (XAB19:14) and ECS Signal Functionality
If the EMK bit in the MODE register is set (see MEBI block description chapter) the PIX5:0 values will
be output on XAB19:14 respectively (port K bits 5:0) when the system is addressing within the physical
program page window address space (0x8000–0xBFFF) and is in an expanded mode. When addressing
anywhere else within the physical address space (outside of the paging space), the XAB19:14 signals will
be assigned a constant value based upon the physical address space selected. In addition, the active-low
emulation chip select signal, ECS, will likewise function based upon the assigned memory allocation. In
the cases of 48K byte and 64K byte allocated physical FLASH/ROM space, the operation of the ECS
signal will additionally depend upon the state of the ROMHM bit (see Section 19.3.2.4, “Miscellaneous
System Control Register (MISC)”) in the MISC register. Table 19-18, Table 19-19, Table 19-20, and
Table 19-21 summarize the functionality of these signals based upon the allocated memory configuration.
Again, this signal information is only available externally when the EMK bit is set and the system is in an
expanded mode.
Table 19-18. 0K Byte Physical FLASH/ROM Allocated
Address Space
0x0000–0x3FFF
0x4000–0x7FFF
0x8000–0xBFFF
0xC000–0xFFFF
Page Window Access
N/A
N/A
N/A
N/A
ROMHM
N/A
N/A
N/A
N/A
ECS
1
1
0
0
XAB19:14
0x3D
0x3E
PIX[5:0]
0x3F
Table 19-19. 16K Byte Physical FLASH/ROM Allocated
Address Space
0x0000–0x3FFF
0x4000–0x7FFF
0x8000–0xBFFF
0xC000–0xFFFF
Page Window Access
N/A
N/A
N/A
N/A
ROMHM
N/A
N/A
N/A
N/A
ECS
1
1
1
0
XAB19:14
0x3D
0x3E
PIX[5:0]
0x3F
MC9S12KG128 Data Sheet, Rev. 1.16
562
Freescale Semiconductor