MC9S12KG128_10 Datasheet, PDF (222/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 7 Analog-to-Digital Converter (ATD10B16CV3) Block Description
.
Table 7-1. ATD10B16CV3 Memory Map
Address Offset
Use
0x0000
ATD Control Register 0 (ATDCTL0)
0x0001
ATD Control Register 1 (ATDCTL1)
0x0002
ATD Control Register 2 (ATDCTL2)
0x0003
ATD Control Register 3 (ATDCTL3)
0x0004
ATD Control Register 4 (ATDCTL4)
0x0005
ATD Control Register 5 (ATDCTL5)
0x0006
ATD Status Register 0 (ATDSTAT0)
0x0007
0x0008
Unimplemented
ATD Test Register 0 (ATDTEST0)¹
0x0009
ATD Test Register 1 (ATDTEST1)
0x000A
ATD Status Register 2 (ATDSTAT2)
0x000B
ATD Status Register 1 (ATDSTAT1)
0x000C
ATD Input Enable Register 0 (ATDDIEN0)
0x000D
ATD Input Enable Register 1 (ATDDIEN1)
0x000E
Port Data Register 0 (PORTAD0)
0x000F
Port Data Register 1 (PORTAD1)
0x0010, 0x0011
ATD Result Register 0 (ATDDR0H, ATDDR0L)
0x0012, 0x0013
ATD Result Register 1 (ATDDR1H, ATDDR1L)
0x0014, 0x0015
ATD Result Register 2 (ATDDR2H, ATDDR2L)
0x0016, 0x0017
ATD Result Register 3 (ATDDR3H, ATDDR3L)
0x0018, 0x0019
ATD Result Register 4 (ATDDR4H, ATDDR4L)
0x001A, 0x001B
ATD Result Register 5 (ATDDR5H, ATDDR5L)
0x001C, 0x001D
ATD Result Register 6 (ATDDR6H, ATDDR6L)
0x001E, 0x001F
ATD Result Register 7 (ATDDR7H, ATDDR7L)
0x0020, 0x0021
ATD Result Register 8 (ATDDR8H, ATDDR8L)
0x0022, 0x0023
ATD Result Register 9 (ATDDR9H, ATDDR9L)
0x0024, 0x0025
ATD Result Register 10 (ATDDR10H, ATDDR10L)
0x0026, 0x0027
ATD Result Register 11 (ATDDR11H, ATDDR11L)
0x0028, 0x0029
ATD Result Register 12 (ATDDR12H, ATDDR12L)
0x002A, 0x002B
ATD Result Register 13 (ATDDR13H, ATDDR13L)
0x002C, 0x002D
ATD Result Register 14 (ATDDR14H, ATDDR14L)
0x002E, 0x002F
ATD Result Register 15 (ATDDR15H, ATDDR15L)
1 _{ATDTEST0 is intended for factory test purposes only.}
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R
R
R/W
R/W
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
NOTE
Register Address = Base Address + Address Offset, where the Base Address
is defined at the MCU level and the Address Offset is defined at the module
level.
MC9S12KG128 Data Sheet, Rev. 1.16
222
Freescale Semiconductor