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MC9S12KG128_10 Datasheet, PDF (442/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers
Chapter 14 Dual Output Voltage Regulator (VREG3V3V2) Block Description
14.1.3 Block Diagram
Figure 14-1 shows the function principle of VREG3V3V2 by means of a block diagram. The regulator
core REG consists of two parallel sub-blocks, REG1 and REG2, providing two independent output
voltages.
VDDR
VDDA
LVD
REG2
REG1
LVR
LVR
POR
VDDPLL
VSSPLL
VDD
POR
VSSA
VSS
VREGEN
CTRL
LVI
REG: Regulator Core
LVD: Low Voltage Detect
CTRL: Regulator Control
LVR: Low Voltage Reset
POR: Power-on Reset
PIN
Figure 14-1. VREG3V3 Block Diagram
MC9S12KG128 Data Sheet, Rev. 1.16
442
Freescale Semiconductor