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MC9S12KG128_10 Datasheet, PDF (454/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers | |||
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Chapter 15 Background Debug Module (BDMV4) Block Description
15.3.2.1 BDM Status Register (BDMSTS)
0xFF01
7
6
5
4
3
2
1
0
R
BDMACT
SDV
TRACE
UNSEC
0
ENBDM
ENTAG
CLKSW
W
Reset:
Special single-chip mode:
11
1
0
0
0
0
02
0
Special peripheral mode:
0
1
0
0
0
0
0
0
All other modes:
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
= Implemented (do not alter)
Figure 15-3. BDM Status Register (BDMSTS)
Note:
1 ENBDM is read as "1" by a debugging environment in Special single-chip mode when the device is not secured or secured
but fully erased (Flash and EEPROM).This is because the ENBDM bit is set by the standard firmware before a BDM command
can be fully transmitted and executed.
2 UNSEC is read as "1" by a debugging environment in Special single-chip mode when the device is secured and fully erased,
else it is "0" and can only be read if not secure (see also bit description).
Read: All modes through BDM operation
Write: All modes but subject to the following:
⢠BDMACT can only be set by BDM hardware upon entry into BDM. It can only be cleared by the
standard BDM ï¬rmware lookup table upon exit from BDM active mode.
⢠CLKSW can only be written via BDM hardware or standard BDM ï¬rmware write commands.
⢠All other bits, while writable via BDM hardware or standard BDM ï¬rmware write commands,
should only be altered by the BDM hardware or standard ï¬rmware lookup table as part of BDM
command execution.
⢠ENBDM should only be set via a BDM hardware command if the BDM ï¬rmware commands are
needed. (This does not apply in special single-chip mode).
MC9S12KG128 Data Sheet, Rev. 1.16
454
Freescale Semiconductor
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