XRT72L13 Datasheet, PDF (8/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
áç
PRELIMINARY
within the Burst I/O Cycle (Motorola-type µC/µP) ............................................................. 187
Figure 57. Behavior of the Microprocessor Interface signals, during the "Initial" Write Operation of
a Burst Cycle (Motorola-type Processor) .......................................................................... 188
Figure 58. Behavior of the Microprocessor Interface Signals, during subsequent "Write" Operations
with the Burst I/O Cycle (Motorola-type µC/µP) ................................................................ 189
3.3 ON-CHIP REGISTER ORGANIZATION ................................................................................................................ 189
3.3.1 Framer Register Addressing .............................................................................................................. 189
3.3.2 M13 Mux/Framer Register Description ............................................................................................... 189
OPERATING MODE REGISTER (ADDRESS = 0X00) ...................................................................................... 190
I/O CONTROL REGISTER (ADDRESS = 0X01) ............................................................................................. 191
PART NUMBER REGISTER (ADDRESS = 0X02) ........................................................................................... 192
VERSION NUMBER REGISTER (ADDRESS = 0X03) ...................................................................................... 192
BLOCK INTERRUPT ENABLE REGISTER (ADDRESS = 0X04) ........................................................................ 192
BLOCK INTERRUPT STATUS REGISTER (ADDRESS = 0X05) ........................................................................ 193
RXFIFO CONTROL REGISTER (ADDRESS = 0X06) ...................................................................................... 194
M23 CONFIGURATION REGISTER (ADDRESS = 0X07) ................................................................................ 194
TABLE 9: ............................................................................................................................................... 196
M23 TX DS2 AIS REGISTER (ADDRESS = 0X08) ...................................................................................... 196
M23 REQUEST LOOPBACK REGISTER (ADDRESS = 0X09) .......................................................................... 197
M23 LOOPBACK ACTIVATION REGISTER (ADDRESS = 0X0A) ...................................................................... 197
M23 RX DS2 AIS REGISTER (ADDRESS = 0X0B) ..................................................................................... 198
DS3 TEST REGISTER (ADDRESS = 0X0C) ................................................................................................ 198
RX DS3 CONFIGURATION AND STATUS REGISTER (ADDRESS = 0X10) ......................................................... 199
RX DS3 STATUS REGISTER (ADDRESS = 0X11) ......................................................................................... 200
RX DS3 INTERRUPT ENABLE REGISTER (ADDRESS = 0X12) ........................................................................ 201
RX DS3 INTERRUPT STATUS REGISTER (ADDRESS = 0X13) ...................................................................... 202
RX DS3 SYNC DETECT REGISTER (ADDRESS = 0X14) ............................................................................... 203
RXDS3 FEAC INTERRUPT ENABLE/STATUS REGISTER (ADDRESS = 0X17) ................................................ 204
RXDS3 LAPD CONTROL REGISTER (ADDRESS = 0X18) ............................................................................ 205
RXDS3 LAPD STATUS REGISTER (ADDRESS = 0X19) ............................................................................... 205
M12 DS2 # 1 CONFIGURATION REGISTER (ADDRESS = 0X1A) .................................................................. 206
M12 DS2 # 2 CONFIGURATION REGISTER (ADDRESS = 0X1B) .................................................................. 207
M12 DS2 # 3 CONFIGURATION REGISTER (ADDRESS = 0X1C) .................................................................. 208
M12 DS2 # 4 CONFIGURATION REGISTER (ADDRESS = 0X1D) .................................................................. 209
M12 DS2 # 5 CONFIGURATION REGISTER (ADDRESS = 0X1E) .................................................................. 210
M12 DS2 # 6 CONFIGURATION REGISTER (ADDRESS = 0X1F) ................................................................... 211
M12 DS2 # 7 CONFIGURATION REGISTER (ADDRESS = 0X20) ................................................................... 212
M12 DS2 # 1 AIS REGISTER (ADDRESS = 0X21) ...................................................................................... 213
M12 DS2 # 2 AIS REGISTER (ADDRESS = 0X21) ...................................................................................... 214
TX DS3 CONFIGURATION REGISTER (ADDRESS = 0X30) ............................................................................ 215
TRANSMIT DS3 CONFIGURATION & STATUS REGISTER (ADDRESS = 0X31) ................................................. 217
TX DS3 FEAC REGISER (ADDRESS = 0X32) ............................................................................................. 217
TXDS3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33) .................................................................. 218
TXDS3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34) ...................................................... 218
TXDS3 M-BIT MASK REGISTER (ADDRESS = 0X35) ................................................................................... 219
TX DS3 F-BIT MASK REGISTER - 1 (ADDRESS = 0X36) ............................................................................. 220
TXDS3 F-BIT MASK REGISTER - 2 (ADDRESS = 0X37) .............................................................................. 220
TX DS3 F-BIT MASK REGISTER - 3 (ADDRESS = 0X38) ............................................................................. 221
TXDS3 F-BIT MASK REGISTER - 4 (ADDRESS = 0X39) .............................................................................. 221
222
PMON LCV EVENT COUNT REGISTER - LSB (ADDRESS = 0X51) .............................................................. 222
PMON FRAMING BIT ERROR COUNT REGISTER - MSB (ADDRESS = 0X52) ............................................... 222
PMON FRAMING BIT ERROR COUNT REGISTER - LSB (ADDRESS = 0X53) ................................................ 223
PMON P-BIT ERROR COUNT REGISTER - MSB (ADDRESS = 0X54) ........................................................... 223
PMON P-BIT ERROR COUNT REGISTER - LSB (ADDRESS = 0X55) ............................................................ 223
VI