XRT72L13 Datasheet, PDF (52/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
áç
PRELIMINARY
AC ELECTRICAL CHARACTERISTICS
Test Conditions: TA = 25(C, VCC = 3.3V + 5% unless otherwise specified
SYMBOL
PARAMETER
MIN. TYP.
MAX.
t₈
"TxFrameRef" hold-time, from rising edge of "TxIn-
2.3
Clk"
t₉
"TxInClk" to "TxOHInd" output delay
14
t₁₀ "TxInClk" to "TxFrame" output delay
14
Transmit Payload Data Input Interface - Looped-Timed/Nibble Mode (See Figure 4)
t₁₁ Payload data set-up time to "latching edge" of
6
RxOutClk
Transmit Payload Data Input Interface - Looped-Timed/Nibble Mode (See Figure 4)
t₁₂ Payload data hold time, from "latching edge" of
0
RxOutClk
t₁₃ TxNibClk to TxNibFrame output delay
8
Transmit Payload Data Input Interface - Local-Timed/Nibble Mode (See Figure 5)
t₁₄ Payload Nibble set-up time, to "latching edge" of
0
"TxInClk"
t₁₅ Payload Nibble hold time, from "latching edge" of
15
"TxInClk"
t₁₆ TxFrameRef set-up time, to "latching edge" of "TxIn- 0
Clk"
t₁₇ TxFrameRef hold time, from "latching edge" of "TxIn- 15
Clk"
t₁₈ "TxNibClk" to "TxNibFrame" output delay time
21
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CONDITIONS
Frame IC is
"Frame Slave"
Frame IC is
"Frame Slave"
Frame IC is
"Frame Slave"
AC ELECTRICAL CHARACTERISTICS (CONT.)
Test Conditions: TA = 25(C, VCC = 3.3V + 5% unless otherwise specified
SYMBOL
PARAMETER
MIN. TYP.
Transmit Overhead Input Interface Timing - Method 1 (see Figure 6)
t₂₁ "TxOHClk" to "TxOHFrame" output delay
t₂₂ "TxOHIns" set-up time, to falling edge of "TxOHClk"
0
t₂₃ "TxOHIns" hold time, from falling edge of "TxOHClk" 0
t₂₄ "TxOH" data set-up time, to falling edge of "TxO-
0
HClk"
t₂₅ "TxOH" data hold time, from falling edge of "TxO-
0
HClk"
Transmit Overhead Data Input Interface - Method 2 (see Figure 7)
t₂₆ “TXOHIns” to “TxInClk” (rising edge) set-up Time
0
t₂₇ TxInClk clock rising edge to “TxOHIns” hold-time
0
MAX. UNITS
0
ns
ns
ns
ns
ns
ns
ns
CONDITIONS
40