XRT72L13 Datasheet, PDF (343/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

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PRELIMINARY
XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
1. It should cease transmitting a FERF (Far-End
Receive Failure) indicator to the “Remote Termi-
nal Equipment”. The XRT72L13 Framer IC auto-
matically supports this action via the “FERF-
upon-OOF” feature.
2. It should transmit the appropriate FEAC Message
(per Bellcore GR-499-CORE), to the “Remote
Terminal Equipment, indicating that the “Service
Affecting” condition has been cleared.
4.3.6.2.3 The “Change of State” of Receive AIS
Interrupt
If the “Change of State on Receive AIS (Alarm Indica-
tion Signal)” Interrupt is enabled, then the XRT72L13
Framer IC will generate an interrupt in response to ei-
ther of the following conditions.
1. When the XRT72L13 Framer IC detects an AIS
pattern, in the “incoming” DS3 data stream, and
2. When the XRT72L13 Framer IC no longer detects
the AIS pattern in the “incoming” DS3 data
stream.
Conditions causing the XRT72L13 Framer IC to
declare an AIS condition
• If the Receive DS3 Framer block (within the
XRT72L13 Framer IC) detects at least 63 DS3
frames, which contains the AIS pattern.
Conditions causing the XRT72L13 Framer IC to
clear the AIS condition.
• Whenever, the “Receive DS3 Framer” block
detects 63 DS3 frames, which do not contain the
AIS pattern.
Enabling and Disabling the “Change of State on
Receive AIS Interrupt:
The user can enable or disable the “Change of State
on Receive AIS” Interrupt, by writing the appropriate
value into Bit 5 (AIS Interrupt Enable) within the
“RxDS3 Interrupt Enable” Register, as illustrated be-
low.
RXDS3 INTERRUPT ENABLE REGISTER (ADDRESS = 0X12)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CP Bit Error
Interrupt
Enable
LOS
Interrupt
Enable
AIS
Interrupt
Enable
Idle Interrupt
Enable
FERF
Interrupt
Enable
AIC
Interrupt
Enable
OOF
Interrupt
Enable
P-Bit Error
Interrupt
Enable
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Setting this bit-field to “1” enables this interrupt. Con-
versely, setting this bit-field to “0” disables this inter-
rupt.
Servicing the “Change of State” on Receive AIS
Interrupt
Whenever the XRT72L13 Framer IC detects this in-
terrupt, it will do all of the following.
• It will assert the “Interrupt Request” output pin
(INT*) by driving it “LOW”.
• It will set Bit 5 (AIS Interrupt Status) within the
“RxDS3 Interrupt Status” Register, to “1”, as indi-
cated below.
RXDS3 INTERRUPT STATUS REGISTER (ADDRESS = 0X13)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CP-Bit Error
Interrupt
Status
LOS
Interrupt
Status
AIS
Interrupt
Status
Idle Interrupt
Status
FERF
Interrupt
Status
AIC
Interrupt
Status
OOF
Interrupt
Status
P-Bit Error
Interrupt
Status
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
1
0
0
0
0
0
Whenever the “Terminal Equipment” encounters a
following.
“Change in AIS on Receive” interrupt, it should do the
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