XRT72L13 Datasheet, PDF (306/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
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PRELIMINARY
tion 4.1, that each DS3 F-frame consists of four (4) F-
bits that occur in a repeating "1001" pattern. The
"Receive DS3 Framer" block will attempt to locate this
F-bit pattern by performing five (5) different searches
in parallel. The F-bit search has been declared suc-
cessful if at least 10 consecutive F-bits are detected.
After the F-bit match has been declared, the "Receive
DS3 Framer" block will then transition into the "M-Bit
Search" state within the "DS3 Frame Acquisition/
Maintenance" algorithm (per Figure 100 ). When the
"Receive DS3 Framer" block reaches this state, it will
begin searching for valid M-bits. Recall from the dis-
cussion in Section 3.1 that each DS3 "M-frame" con-
sists of three (3) M-bits that occur in a repeating "010"
pattern. The "M-bit" search is declared successful if
three consecutive "M-frames" (or 21 "F-frames") are
detected correctly. Once this occurs an "M-frame
lock" is declared, and the "Receive DS3 Framer"
block will then transition to the "In-Frame" state. At
this point, the "Receive DS3 Framer" block will de-
clare itself in the "In-Frame" condition, and will begin
"Frame Maintenance" operations. The "Receive DS3
Framer" block will then indicate that it has transitioned
from the "OOF" condition into the "In-Frame" condi-
tion by doing the following.
• Generate a "Change in OOF Condition" interrupt to
the local µP.
• Negate the RxOOF output pin (e.g., toggle it "low").
• Negate the "Rx OOF" bit-field (Bit 4) within the
Receive DS3 Configuration and Status Register.
The user can configure the Receive DS3 Framer to
operate such that 'valid parity' (P-bits) must also be
detected before the Receive DS3 Framer can declare
itself "In Frame". The user can set this configuration
by writing the appropriate data to the "Rx DS3 Config-
uration and Status" Register, as depicted below.
RX DS3 CONFIGURATION AND STATUS REGISTER, (ADDRESS = 0X10)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT2
BIT 1
BIT 0
Rx AIS
Rx LOS
Rx Idle
Rx OOF
Reserved
Framing on
Parity
F-Sync
Algo
M-Sync
Algo
RO
RO
RO
RO
R/O
R/W
R/W
R/W
X
X
X
X
X
X
X
X
Table 31 relates the contents of this bit field to the
framing acquisition criteria.
TABLE 31: THE RELATIONSHIP BETWEEN THE CONTENTS OF BIT 2 (FRAMING ON PARITY) WITHIN THE "RX DS3
CONFIGURATION AND STATUS" REGISTER, AND THE RESULTING "FRAMING ACQUISITION CRITERIA
FRAMING
ON PARITY
(BIT 2)
FRAMING ACQUISITION CRITERIA
0
The "In-frame" is declared after F-bit synchronization (10 F-bit matches) followed by M-bit synchronization
(M-bit matches for 3 DS3 M-frames)
1
The "In-frame" condition is declared after F-bit synchronization, followed by M-bit synchronization, with valid
parity over the frames. Also, the occurrence of parity errors in 2 or more out of 5 frames starts a frame search
Once the "Receive DS3 Framer" block is operating in
the "In-Frame" condition, normal data recovery and
processing of the DS3 data stream begins. The max-
imum average reframing time is less than 1.5 ms.
4.3.2.2 Frame Maintenance Mode Operation
When the "Receive DS3 Framer" block is operating in
the "In-Frame" state (per Figure 100 ), it will then be-
gin to perform "Frame Maintenance" operations;
where it will continue to verify that the F- and M-bits
are present, at their proper locations. While the "Re-
ceive DS3 Framer" block is operating in the "Frame
Maintenance" mode, it will declare an "Out-of-Frame"
(OOF) condition if 3 or 6 F-bits (depending upon user
selection) out of 16 consecutive F-bits are in error.
The user makes this selection for the "OOF Declara-
tion" criteria by writing the appropriate value to bit 1
(F-Sync Algo) of the "Rx DS3 Configuration and Sta-
tus" Register, as depicted below.
294