XRT72L13 Datasheet, PDF (155/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

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PRELIMINARY
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC XRT72L13
REV. 1.0.6
RLOOP
1
LLOOP
1
RESULTING LOOP-BACK MODE OF THE XRT7300
Digital Local Loop-back Mode
Writing a "1" into this bit-field commands the
XRT72L13 M13 device to toggle the "LLOOP" output
signal "high". Writing a "0" into this bit-field com-
mands the XRT72L13 M13 device to toggle this out-
put signal "low".
For a detailed description of the XRT7300 DS3/E3
LIU's operation, during each of these above-men-
tioned loop-back modes, please consult the
"XRT7300 DS3/E3/STS-1 LIU IC" Data Sheet.
NOTE: If the customer is not using the XRT7300 DS3/E3/
STS-1 LIU IC, then he/she can use this bit-field and the
"LLOOP" output pin for other purposes.
2.3.2.95 Line Interface Scan Register
LINE INTERFACE SCAN REGISTER (ADDRESS = 0X81)
BIT 7
RO
0
BIT 6
RO
0
BIT 5
RO
0
BIT 4
RO
0
BIT 3
RO
0
BIT 2
DMO
RO
0
BIT 1
RLOL
RO
0
BIT 0
RLOS
RO
0
Bit 2 - DMO - (Drive Monitor Output)
This "Read-Only" bit-field indicates the logic state of
the DMO input pin of the XRT72L13 M13 device.
This input pin is intended to be connected to the DMO
output pin of the XRT7300 DS3/E3 LIU IC. If this bit-
field contains a logic "1", then the DMO input pin is
"high". The XRT7300 DS3/E3 LIU IC will set this pin
"high" if the drive monitor circuitry (within the
XRT7300) has not detected any bipolar signals at the
MTIP and MRING inputs (of the XRT7300) within the
last 128 + 32 bit periods.
Conversely, if this bit-field contains a logic "0", then
the DMO input pin is "high". The XRT7300 DS3/E3
LIU IC will set this pin "low" if bipolar signals are be-
ing detected at the MTIP and MRING input pins.
NOTE: If this customer is not using the XRT7300 DS3/E3
LIU IC, then he/she can use this input pin for a variety of
other purposes.
Bit 1 - RLOL - (Receive Loss of Lock)
This "Read-Only" bit-field indicates the logic state of
the RLOL input pin of the XRT72L13 M13 device.
This input pin is intended to be connected to the
RLOL output pin of the XRT7300 DS3/E3 LIU IC. If
this bit-field contains a logic "1", then the RLOL input
pin is "high". The XRT7300 DS3/E3 LIU IC will set
this pin "high" if the clock recovery phase-locked-loop
circuitry (within the XRT7300) has lost "lock" with the
incoming DS3/E3 data-stream and is not properly re-
covering clock and data.
Conversely, if this bit-field contains a logic "0", then
the RLOL input pin is "low". The XRT7300 DS3/E3
LIU IC will hold this pin "low" as long as this "clock re-
covery phase-locked-loop" circuitry (within the
XRT7300) is properly "locked" onto the incoming DS3
data-stream, and is properly recovering clock and da-
ta from this data-stream.
For more information on the operation of the
XRT7300 DS3/E3/STS-1 LIU IC, please consult the
"XRT7300 DS3/E3/STS-1 LIU IC" data sheet.
NOTE: If the customer is not using the XRT7300 DS3/E3/
STS-1 IC, then he/she can use this bit-field, and the RLOL
input pin for other purposes.
Bit 0 - RLOS - (Receive Loss of Signal)
This "Read-Only" bit-field indicates the logic state of
the RLOS input pin of the XRT72L13 M13 device.
This input pin is intended to be connected to the
RLOS output pin of the XRT7300 DS3/E3 LIU IC. If
this bit-field contains a logic "1", then the RLOS input
pin is "high". The XRT7300 will toggle this signal
"high" if it (the XRT7300 LIU IC) is currently declaring
an LOS (Loss of Signal) condition.
Conversely, if this bit-field contains a logic "0", then
the RLOS input pin is "low". The XRT7300 will hold
this signal "low" if it is NOT currently declaring an
LOS (Loss of Signal) condition.
For more information on the LOS Declaration and
Clearance criteria of the XRT7300, please consult the
"XRT7300 DS3/E3/STS-1 LIU IC" data sheet.
NOTE: Asserting the RLOS input pin will cause the XRT
72L13 DS3 Framer IC to generate the "Change in LOS
Condition" interrupt and declare an "LOS" (Loss of Signal)
condition. Therefore, this input pin should not be used as a
general purpose input.
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