XRT72L13 Datasheet, PDF (255/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

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PRELIMINARY
XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
In this mode, the Transmit Section of the XRT72L13
will use the "RxLineClk" signal as its timing reference.
When the XRT72L13 is operating in the "Nibble-
Mode", it will "internally" divide the RxLineClk signal,
by a factor of four (4) and will output this signal via the
"TxNibClk" output pin.
B. Nibble-Parallel Mode
The XRT72L13 will accept the "DS3" payload data,
from the Terminal Equipment in a "nibble-parallel"
manner, via the TxNib[3:0] input pins. The "Transmit
Terminal Equipment Input Interface" block will latch
this data into its circuitry, on the rising edge of the Tx-
NibClk output signal.
C. Delineation of the "outbound" DS3 frames
The XRT72L13 will pulse the "TxNibFrame" output
pin "high" for one bit-period; coincident with the
XRT72L13 processing the last nibble of a given DS3
frame.
D. Sampling of payload data, from the Terminal
Equipment
In Mode 4, the XRT72L13 will sample the data, at the
TxNib[3:0] input pins, on the third rising edge of the
"RxOutClk" clock signal, following a pulse in the "Tx-
NibClk" signal (see Figure 70 ).
NOTE: The "TxNibClk" signal, from the XRT72L13; oper-
ates nominally at 11.184 MHz (e.g., 44.736 MHz divided by
4). However, for reasons described below, "TxNibClk"
effectively operates at a lower clock frequency. The Trans-
mit Payload Data Input Interface is only used to accept the
payload data, which is intended to be carried by "outbound"
DS3 frames. The Transmit Payload Data Input Interface is
not designed to accommodate the entire DS3 data stream.
The DS3 Frame consists of 4704 payload bits or 1176
nibbles. Therefore, the XRT72L13 will supply 1176
"TxNibClk" pulses between the rising edges of two
consecutive "TxNibFrame" pulses. The DS3 Frame
repetition rate is 9.398kHz. Hence, 1176 "TxNibClk"
pulses for each DS3 frame period amounts to "TxNib-
Clk" running at approximately 11.052 MHz. The
method by which the 1176 "TxNibClk" pulses are dis-
tributed throughout the DS3 frame period is present-
ed below.
Nominally, the "Transmit Section" within the
XRT72L13 will generate a "TxNibClk" pulse for every
4 "RxOutClk" (or "TxInClk") periods. However, in 14
cases (within a DS3 frame period), the Transmit Pay-
load Data Input Interface will allow 5 "TxInClk" peri-
ods to occur between two consecutive "TxNibClk"
pulses.
Interfacing the "Transmit Payload Data Input In-
terface" block (of the XRT72L13) to the Terminal
Equipment for Mode 4 Operation
Figure 69 presents an illustration of the "Transmit
Payload Data Input Interface" block (within the
XRT72L13) being interfaced to the Terminal Equip-
ment, for "Mode 4" Operation.
FIGURE 69. ILLUSTRATION OF THE "TERMINAL EQUIPMENT" BEING INTERFACED TO THE "TRANSMIT PAYLOAD DATA
INPUT INTERFACE" BLOCK (OF THE XRT72L13) FOR MODE 4 (NIBBLE-PARALLEL/LOOP-TIMED) OPERATION
DS3_Nib_Clock_In
DS3_Data_Out[3:0
]
Tx_Start_of_Fram
Terminal Equipment
11.184MHz
4
VCC
TxNibClk
TxNib[3:0]
TxNibFrame
44.736MHz
RxLineClk
NibInt
XRT72L13 DS3 Framer
Mode 4 Operation of the Terminal Equipment
When the XRT72L13 is operating in this mode, it will
function as the source of the 11.184MHz (e.g., the
44.736MHz clock signal divided by "4") clock signal;
that will be used as the "Terminal Equipment" Inter-
face clock by both the XRT72L13 and the Terminal
Equipment.
The Terminal Equipment will output the payload data
of the "outbound" DS3 data stream via its
"DS3_Data_Out[3:0]" pins on the rising edge of the
"11.184MHz clock signal at the "DS3_Nib_Clock_In"
input pin.
The XRT72L13 will latch the "outbound" DS3 data
stream (from the Terminal Equipment) on the rising
edge of the "TxNibClk" output clock signal. The
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