XRT72L13 Datasheet, PDF (299/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

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PRELIMINARY
XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
FIGURE 92. A SIMPLE ILLUSTRATION OF THE "RECEIVE DS3 LIU INTERFACE" BLOCK
To Receive DS3
Framer Block
Receive DS3
LIU Interface
Block
RxPOS
RxNEG
RxLineClk
The Receive Section of the XRT72L13 will via the Re-
ceive DS3 LIU Interface Block receive timing and data
information from the incoming DS3 data stream. The
DS3 Timing information will be received via the “RxLi-
neClk” input pin; and the DS3 data information will be
received via the “RxPOS” and “RxNEG” input pins.
The Receive DS3 LIU Interface block is capable of re-
ceiving DS3 data pulses in unipolar or bipolar format.
If the Receive DS3 framer is operating in the bipolar
format, then it can be configured to decode either AMI
or B3ZS line code data. Each of these input formats
and line codes will be discussed in detail, below.
4.3.1.1 Unipolar Decoding
If the Receive DS3 LIU Interface block is operating in
the Unipolar (single-rail) mode, then it will receive the
Single Rail NRZ DS3 data pulses via the RxPOS in-
put pin. The "Receive DS3 LIU Interface" block will
also receive its timing signal via the RxLineClk signal.
NOTE: The "RxLineClk" signal will function as the timing
source for the entire Receive Section of the XRT72L13.
No data pulses will be applied to the RxNEG input
pin. The "Receive DS3 LIU Interface" block receives
a logic "1" when a logic "1" level signal is present at
the RxPOS pin, during the sampling edge of the RxLi-
neClk signal. Likewise, a logic "0" is received when a
logic "0" level signal is applied to the RxPOS pin.
Figure 93 presents an illustration of the behavior of
the RxPOS, RxNEG and RxLineClk input pins when
the "Receive DS3 LIU Interface" block is operating in
the "Unipolar" mode.
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