XRT72L13 Datasheet, PDF (248/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
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PRELIMINARY
FIGURE 63. ILLUSTRATION OF THE "TERMINAL EQUIPMENT" BEING INTERFACED TO THE "TRANSMIT PAYLOAD DATA
INPUT INTERFACE" BLOCK (OF THE XRT72L13) FOR MODE 1(SERIAL/LOOP-TIMING) OPERATION
DS3_Clock_In
DS3_Data_Out
Tx_Start_of_Frame
DS3_Overhead_Ind
Terminal Equipment
44.736 MHz
RxOutClk
TxSer
TxFrame
TxOH_Ind
NibInt
XRT72L13 DS3 Framer
Mode 1, Operation of the Terminal Equipment
When the XRT72L13 is operating in this mode; it will
function as the source of the 44.736MHz clock signal
(via the “RxOutClk” signal). This clock signal will be
used as the "Terminal Equipment Interface" clock by
both the XRT72L13 IC and the Terminal Equipment.
The Terminal Equipment will serially output the "pay-
load data" of the "outbound" DS3 data stream via its
"DS3_Data_Out" pin. The Terminal Equipment will
update the data on the "DS3_Data_Out" pin upon the
rising edge of the 44.736 MHz clock signal, at its
"DS3_Clock_In" input pin (as depicted in Figure 63
and Figure 64 ).
The XRT72L13 will latch the "outbound" DS3 data
stream (from the Terminal Equipment) on the rising
edge of the "RxOutClk" signal.
The XRT72L13 will indicate that it is processing the
last bit, within a given "outbound" DS3 frame, by puls-
ing its "TxFrame" output pin "high" for one bit-period.
When the Terminal Equipment detects this pulse at its
"Tx_Start_of_Frame" input, it is expected to begin
transmission of the very next outbound DS3 frame to
the XRT72L13 via the "DS3_Data_Out" (or "TxSer"
pin).
Finally, the XRT72L13 will indicate that it is about to
process an overhead bit by pulsing the "TxOH_Ind"
output pin "high" one bit period prior to its processing
of an OH (Overhead) bit. In Figure 63 , the
"TxOH_Ind" output pin is connected to the
"DS3_Overhead_Ind" input pin; of the Terminal
Equipment. Whenever the "DS3_Overhead_Ind" pin
is pulsed "high" the Terminal Equipment is expected
to not transmit a DS3 payload bit upon the very next
clock edge. Instead, the Terminal Equipment is ex-
pected to delay its transmission of the very next pay-
load bit, by one clock cycle.
The behavior of the signals, between the XRT72L13
and the Terminal Equipment, for DS3 Mode 1 opera-
tion is illustrated in Figure 64 .
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