XRT72L13 Datasheet, PDF (73/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

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PRELIMINARY
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC XRT72L13
REV. 1.0.6
FIGURE 31. ILLUSTRATION OF THE XRT72L13 M13 MULTIPLEXER/FRAMER OPERATING IN THE "CLEAR CHANNEL
DS3 FRAMER REMOTE LOOP-BACK" MODE
TxOHFrame
TxOHEnable
TxOH
TxOHClk
TxOHIns
TxOHInd
TxSer
TxNib[3:0]
TxInClk
TxNibClk
TxFrame
MOTO
D[7:0]
A[8:0]
IntB*
CSB*
RdB_DS
WrB_RW
Rdy_Dtck
Reset*
ALE_AS
RxOHInd
RxSer
RxNib[3:0]
RxOutClk
RxNibClk
RxFrame
RxOHFrame
RxOH
RxOHClk
RxOHEnable
Transmit Overhead
Input
Interface Block
Transmit Payload
Data Input
Interface Block
Transmit DS3
Framer Block
Microprocessor
Interface
Receive Payload
Data Output
Interface Block
Receive Overhead
Output
Interface Block
Tx LAPD Buffer/
Controller
Rx LAPD Buffer/
Controller
Receive DS3
Framer Block
Transmit
LIU
Interface
Block
Receive LIU
Interface
Block
TxPOS
TxNEG
TxLineClk
Remote
Loop-back
Path
RxPOS
RxNEG
RxLineClk
Figure 31 indicates that when the XRT72L13 has
been configured to operate in the "Clear Channel
DS3 Framer Remote Loop-back" Mode, then the fol-
lowing internal connections are made:
• The RxPOS input signal is routed to the TxPOS
output pin.
• The RxNEG input signal is routed to the TxNEG
output pin.
• The RxLineClk output clock signal is routed to the
TxLineClk input pin.
1.2.1.1.3 PRBS Generator/Receiver
In order to support diagnostic testing of the signal
path, the XRT72L13 contains a PRBS Generator and
Receiver. This feature can be operated in conjunc-
tion with (or not) with the "Clear Channel DS3 Framer
Local" or "Remote" Loop-back Modes.
A more detailed description of this feature will be pre-
sented in the next revision of the XRT72L13 Data
Sheet.
1.3 XRT72L13 OPERATION WHILE IN THE
"HIGH SPEED HDLC CONTROLLER" MODE
Figure 32 presents a Functional Block Diagram of the
XRT72L13 M13 Multiplexer/Framer IC, when it has
been configured to operate in the "High Speed HDLC
Controller Mode"
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