XRT72L13 Datasheet, PDF (20/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
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PRELIMINARY
PIN DESCRIPTIONS
PIN #
47
NAME
RxDS1Clk_7
48
RxDS1Data_6
RxHDLC_Data_6
49
GND
50
RxDS1Clk_6
TYPE
O
O
****
O
DESCRIPTION
Receive DS1 Clock Output - Channel 7:
This pin outputs a DS1 (1.544MHz) clock signal to the Terminal
Equipment. The XRT72L13 will update the data on the
"RxDS1Data_7" line, upon the rising edge of this signal.
NOTES:
1. This output pin is inactive if the corresponding M12 DEMUX is
de-multiplexing an ITU-T G.747 data stream.
2. This pin will output a DS2 rate clock signal (6.312MHz) if M12
# 2 is bypassed.
Receive DS1/E1 Data Output - Channel 6/Receive HDLC Control-
ler Block Output - Bit 6:
The funtion of this output pin depends upon whether the XRT72L13 is
operating in the "Multiplexer/De-Multiplexer" Mode or in the "High
Speed HDLC Controller" Mode.
Receive DS1/E1 Data Output - Channel 6: (Multiplexer/De-Multi-
plexer Mode):
This pin outputs either a DS1 or E1 signal from the M12 multiplexer.
Each bit, within the DS1 or E1 data stream is output upon the rising
edge of RxDS1Clk_6.
Receive HDLC Controller Block Output - Bit 6: (High Speed HDLC
Controller Mode)
This output pin along with RxHDLC_Data[0:5] and RxHDLC_Data_7
output the contents of all HDLC frames that have been received (via
the DS3 payload) from the remote terminal equipment.
The data on this output pin is updated upon the rising edge of "RxH-
DLCClk".
NOTE: This pin is inactive while the Receive HDLC Controller is
receiving the "Flag Sequence" octet.
Ground Pin
Receive DS1/E1 Clock Output - Channel 6:
This pin outputs either a DS1 (1.544MHz) or an E1 (2.048MHz) clock
signal to the Terminal Equipment. The XRT72L13 will update the data
on the "RxDS1Data_6" line, upon the rising edge of this signal.
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