XRT72L13 Datasheet, PDF (26/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
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PRELIMINARY
PIN DESCRIPTIONS
PIN #
75
NAME
Rdy_Dtck
76
D3
77
A4
78
ALE_AS
79
D4
80
A5
81
CS
82
D5
83
A6
TYPE
O
I/O
I
I
I/O
I
I
I/O
I
DESCRIPTION
READY or DTACK:
This "active-low" output pin will function as the READY output, when
the microprocessor interface is running in the "Intel" Mode; and will
function as the DTACK output, when the microprocessor interface is
running in the "Motorola" Mode.
"Intel" Mode - READY Output
When the Framer negates this output pin (e.g., toggles it "low"), it indi-
cates (to the mP) that the current READ or WRITE cycle is to be
extended until this signal is asserted (e.g., toggled "high").
"Motorola" Mode: - DTACK (Data Transfer Acknowledge) Output
The Framer will assert this pin in order to inform the local micropro-
cessor that the present READ or WRITE cycle is nearly complete. If
the Framer requires that the current READ or WRITE cycle be
extended, then the Framer will delay its assertion of this signal. The
68000 family of mPs requires this signal from its peripheral devices, in
order to quickly and properly complete a READ or WRITE cycle.
Bi-directional Data Bus (Microprocessor Interface Section):
Please see description for D7
Address Bus Input (Microprocessor Interface) - LSB (Least Sig-
nificant Bit)
(Please see description for A8)
Address Latch Enable/Address Strobe:
This input is used to latch the address (present at the Microprobessor
Interface Address Bus, A[8:0]) into the Framer Microprocessor Inter-
face circuitry and to indicate the start of a READ/WRITE cycle. This
input is active-high in the Intel Mode (MOTO = "low") and active-low in
the Motorola Mode (MOTO = "high").
Bi-directional Data Bus (Microprocessor Interface Section):
Please see description for D7
Address Bus Input (Microprocessor Interface) - LSB (Least Sig-
nificant Bit):
(Please see description for A8)
Chip Select Input:
This active-low input signal selects the Microprocessor Interface Sec-
tion of the Framer and enables Read/Write operations between the
"local" microprocessor and the Framer on-chip registers and RAM
locations.
Bi-directional Data Bus (Microprocessor Interface Section):
Please see description for D7
Address Bus Input (Microprocessor Interface) - LSB (Least Sig-
nificant Bit):
(Please see description for A8)
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