XRT72L13 Datasheet, PDF (207/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

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PRELIMINARY
XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
PAYLOAD HDLC
CONTROLLER
ENABLE
0
0
1
1
M13 DISABLE
RESULTING
OPERATING MODE
0
M13/
Channelized
Mode
1
DS3 Clear
Channel Framer
Mode
0
M13/
Channelized
Mode
1
High Speed
HDLC Controller
Mode
Setting this bit-field to “1” configures the XRT72L13 to
compute and verify a CRC-32 value in each HDLC
frame.
Bit 4 - M13 Disable
This bit-field along with “Payload HDLC Controller En-
able” (bit 6) pemits the user to specify whether the
XRT72L13 M13 device is to operate in either of the
following modes.
• The “M13/Channelized” Mode
• The “DS3 Clear Channel Framer” Mode
• The “High Speed HDLC Controller” Mode.
The relationship between these two bit-fields and the
resulting operating operating mode of the XRT72L13
M13 device is tabulated below.
Bit 5 - RxDS1Clk Gapped (CRC-32) Select
The exact functionality of this bit-field depends upon
whether the user is operating the XRT72L13 in the
“M13-Channelized” or in the “High Speed HDLC Con-
troller” Mode.
M13-Channelized Mode - RxDS1 Gapped Clock
Select
In the “M13-Channelized” Mode, then this bit-field
permits the user to either enable or disable the 28
Digital PLL blocks within the XRT72L13 M13 device.
Setting this bit-field to “0” enables all 28 of these Dig-
ital PLL blocks. In this mode, all 28 (or 21) of the
RxDS1Clk and RxDS1Data output signals will be
smoothed by an internal Digital PLL. This permits the
user to interface the “Receive DS1/E1” Output inter-
face to an external DS1 or E1 LIU IC.
Setting this bit-field to “1” disables all 28 of these Dig-
ital PLL blocks. In this mode, all 28 (or 21) of the
RxDS1Clk and RxDS1Data output signals will NOT
be smoothed by an internal Digital PLL, and will con-
tain gaps.
PAYLOAD HDLC
CONTROLLER
ENABLE
0
0
1
1
M13 DISABLE
RESULTING
OPERATING MODE
0
M13/
Channelized
Mode
1
DS3 Clear
Channel Framer
Mode
0
M13/
Channelized
Mode
1
High Speed
HDLC Controller
Mode
Bit 3 - M13Loopback/Remote Loopback
The exact functionality of this bit-field depends upon
whether the user is operating the XRT72L13 in the
“M13-Channelized” or in the “High Speed HDLC Con-
troller” Mode.
HDLC Controller Mode - CRC16/32 Select
In the “High Speed HDLC Controller” Mode, this bit-
field permits the user to configure the XRT72L13 to
compute and verify a CRC-16 or CRC-32 value within
the HDLC frame.
Setting this bit-field to “0” configures the XRT72L13 to
compute and verify a CRC-16 value in each HDLC
frame.
M13-Channelized Mode - M13 Loopback Select
If the XRT72L13 is operating in the “M13 Channel-
ized” Mode, then this bit-field functions as the “M13
Loopback” select bit-field.
Setting this bit-field to “0” disables the “M13 Loop-
back” Mode. In this mode, the Receive M13 Block will
accept data from the Rx DS3 Framer block (Normal
Operation).
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