XRT72L13 Datasheet, PDF (10/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
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PRELIMINARY
OPERATING MODE REGISTER (ADDRESS = 0X00) ...................................................................................... 247
Figure 73. Illustration of the "Terminal Equipment" being interfaced to the "Transmit Payload Data
Input Interface" block (of the XRT72L13) for Mode 6 (Nibble-Parallel/Local-Timed/Frame-
Master) Operation ................................................................................................................ 249
Figure 74. Behavior of the "Terminal Interface" signals between the XRT72L13 and the Terminal
Equipment (DS3 Mode 6 Operation) .................................................................................. 250
OPERATING MODE REGISTER (ADDRESS = 0X00) ...................................................................................... 250
4.2.2 The Transmit Overhead Data Input Interface ..................................................................................... 250
Figure 75. Simple Illustration of the "Transmit Overhead Data Input Interface" block ................ 251
TABLE 13: A LISTING OF THE OVERHEAD BITS WITHIN THE DS3 FRAME, AND THEIR POTENTIAL SOURCES, WITHIN
THE XRT72L13 ........................................................................................................................ 252
TABLE 14: DESCRIPTION OF "METHOD 1" TRANSMIT OVERHEAD INPUT INTERFACE SIGNALS .................... 253
Figure 76. Illustration of the "Terminal Equipment" being interfaced to the "Transmit Overhead Data
Input Interface" (Method 1) ................................................................................................. 254
TABLE 15: THE RELATIONSHIP BETWEEN THE NUMBER OF RISING CLOCK EDGES IN TXOHCLK, (SINCE "TXO-
HFRAME" WAS LAST SAMPLED "HIGH") TO THE DS3 OVERHEAD BIT, THAT IS BEING PROCESSED ......
255
Figure 77. Illustration of the signal that must occur between the Terminal Equipment and the
XRT72L13, in order to configure the XRT72L13 to transmit a "Yellow Alarm" to the "remote
terminal equipment" ............................................................................................................ 257
TABLE 16: DESCRIPTION OF "METHOD 2" TRANSMIT OVERHEAD INPUT INTERFACE SIGNALS .................... 258
Figure 78. Illustration of the "Terminal Equipment" being interfaced to the "Transmit Overhead Data
Input Interface" (Method 2) ................................................................................................. 259
TABLE 17: THE RELATIONSHIP BETWEEN THE NUMBER OF “TXOHENABLE” PULSES (SINCE THE LAST OCCUR-
RENCE OF THE “TXOHFRAME” PULSE) TO THE DS3 OVERHEAD BIT, THAT IS BEING PROCESSED BY
THE XRT72L13 ........................................................................................................................ 260
Figure 79. Behavior of "Transmit Overhead Data Input Interface" signals between the XRT72L13 and
the Terminal Equipment (for Method 2) ............................................................................. 262
4.2.3 The Transmit DS3 HDLC Controller ................................................................................................... 262
TX DS3 FEAC REGISTER (ADDRESS = 0X32) ........................................................................................... 263
TRANSMIT DS3 FEAC CONFIGURATION AND STATUS REGISTER (ADDRESS = 0X31) ................................ 263
TRANSMIT DS3 FEAC CONFIGURATION AND STATUS REGISTER (ADDRESS = 0X31) ................................. 263
Figure 80. A Flow Chart depicting how to transmit a FEAC Message via the FEAC Transmitter 264
Figure 81. LAPD Message Frame Format .......................................................................................... 265
TABLE 18: THE LAPD MESSAGE TYPE AND THE CORRESPONDING VALUE OF THE FIRST BYTE, WITHIN THE IN-
FORMATION PAYLOAD ............................................................................................................... 266
TRANSMIT DS3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33) ...................................................... 266
TABLE 19: RELATIONSHIP BETWEEN TXLAPD MSG LENGTH AND THE LAPD MESSAGE SIZE ................... 266
TRANSMIT DS3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33) ...................................................... 266
TABLE 20: RELATIONSHIP BETWEEN TXLAPD MSG LENGTH AND THE LAPD MESSAGE SIZE ................... 267
TRANSMIT DS3 LAPD STATUS/INTERRUPT REGISTER (ADDRESS = 0X34) .................................................. 267
Figure 82. Flow Chart depict how to use the LAPD Transmitter ..................................................... 269
OPERATING MODE REGISTER (ADDRESS = 0X00) ...................................................................................... 269
BLOCK INTERRUPT ENABLE REGISTER (ADDRESS = 0X04) ......................................................................... 270
4.2.4 The Transmit DS3 Framer Block ........................................................................................................ 270
Figure 83. A Simple Illustration of the Transmit DS3 Framer Block and the associated paths to other
Functional Blocks ................................................................................................................ 271
TX DS3 CONFIGURATION REGISTER (ADDRESS = 0X30) ............................................................................ 272
TABLE 21: THE RELATIONSHIP BETWEEN THE CONTENTS OF BIT 7 (TX YELLOW ALARM) WITHIN THE TX DS3
CONFIGURATION REGISTER, AND THE RESULTING TRANSMIT DS3 FRAMER BLOCK'S ACTION ..... 272
TABLE 22: THE RELATIONSHIP BETWEEN THE CONTENTS OF BIT 6 (TX X-BITS) WITHIN THE TX DS3 CONFIGU-
RATION REGISTER, AND THE RESULTING TRANSMIT DS3 FRAMER BLOCK'S ACTION ................... 273
TABLE 23: THE RELATIONSHIP BETWEEN THE CONTENTS OF BIT 5 (TX IDLE) WITHIN THE TX DS3 CONFIGURATION
REGISTER, AND THE RESULTING TRANSMIT DS3 FRAMER ACTION .............................................. 273
TABLE 24: THE RELATIONSHIP BETWEEN THE CONTENTS OF BIT 4 (TX AIS PATTERN) WITHIN THE TX DS3 CON-
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