XRT72L13 Datasheet, PDF (74/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

XRT72L13 MULTIPLEXER/FRAMER IC
REV. 1.0.6
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PRELIMINARY
FIGURE 32. ILLUSTRATION OF THE XRT72L13 M13 MULTIPLEXER/FRAMER IC, WHEN IT HAS BEEN CONFIGURED TO
OPERATE IN THE "HIGH SPEED HDLC CONTROLLER" MODE
TxHDLC_Dat[0:7]
TxHDLCClk
Send_FCS
TTxxHHDDLLCCCCoonntrtroolllelerr
BBlolocckk(D(DSS33PPaayyloloaadd))
RxHDLC_Dat[0:7]
RxHDLCClk
RxIDLE
Valid_FCS
RRxxHHDDLLCCCCoonntrtroolllelerr
BBlolocckk(D(DSS33PPaayyloloaadd))
CCleleaarrCChhaannnneel _l
DDSS33FFrraammeerr
MMicicrroopprroocceessssoorr
IInnteterrfafaccee
TxPOS
TxNEG
TxLineClk
RxPOS
RxNEG
RxLineClk
A more detailed description of the "High Speed HDLC
Controller" Mode will be presented in the next update
of this document.
2.0 THE MICROPROCESSOR INTERFACE
BLOCK
The Microprocessor Interface section supports com-
munication between the "local" microprocessor (µP)
and the Framer IC. In particular, the Microprocessor
Interface section supports the following operations
between the local microprocessor and the Framer.
• The writing of configuration data into the Framer
on-chip (addressable) registers.
• The writing of an "outbound" PMDL µPath Mainte-
nance Data Link) message into the "Transmit LAPD
Message" buffer (within the Framer IC).
• The Framer IC's generation of an Interrupt Request
to the µP.
• The µP's servicing of the interrupt request from the
Framer IC.
• The monitoring of the system's "health" by periodi-
cally reading the on-chip Performance Monitor reg-
isters.
• The reading of an "inbound" PMDL Message from
the "Receive LAPD" Message Buffer (within the
Framer IC).
Each of these operations (between the local micro-
processor and the Framer IC) will be discussed in
some detail, throughout this data sheet.
Figure 33 presents a simple block diagram of the Mi-
croprosser Interface Block.
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