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XRT72L13 Datasheet, PDF (363/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
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PRELIMINARY
XRT72L13
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
REV. P1.0.6
5.2.1.1.2.3 Forcing the “G.747 FERF” Condi-
tion
The XRT72L13 permits the user to configure (or
force) a given M12 MUX block to transmit a G.747
FERF indicator to the remote terminal equipment.
This can be accomplished by setting bit 2 (M12
FERF), within the appropriate “M12 DS2 Configura-
tion” Register, to “1”.
For example, if the user sets bit 2 (M12 FERF), within
the “M12 DS2 Configuration” Register to “1” (as illus-
trated below); then M12 MUX Block # 1 will begin to
transmit the “G.747 FERF” indicator to the remote ter-
minal equipment.
M12 DS2 # 1 CONFIGURATION REGISTER (ADDRESS = 0X1A)
BIT 7
Reserved
7
R/W
X
BIT 6
Reserved
6
R/W
X
BIT 5
M12
Bypass
R/W
0
BIT 4
M12
G.747
R/W
1
BIT 3
M12
G.747 Res
R/W
X
BIT 2
M12 FERF
R/W
1
BIT 1
BIT 0
M12LBCode[1:0]
R/W
R/W
X
X
The user can terminate this forced transmission of
the “G.747 FERF” indicator by setting Bit 2 (M12
FERF) to “0”. At this point, the M12 MUX block will
set the “A” bits, based upon “receive conditions” as
detected by M12 DEMUX Block # 1.
5.2.1.1.2.4 Forcing the “E1 AIS” Condition
The XRT72L13 permits the user to configure (or
force) a given M12 MUX block to transmit an E1 AIS
signal. This can be accomplished by setting the cor-
M12 DS2 # 1 AIS REGISTER (ADDRESS = 0X21)
responding bits (within the appropriate “M12 DS2
AIS” Register to “1”).
An illustration of the “M12 DS2 # 1 AIS” Register, is
presented below. This particular register permits the
user to to command the M12 MUX block to overwrite
E1 Channels 0 through 2 (e.g., the E1 Channels as-
sociated with M12 MUX Block # 1), with an E1 AIS
signal.
BIT 7
Insert
AIS
Rx DS1
Channel 3
R/W
0
BIT 6
Insert
AIS
Rx DS1
Channel 2
R/W
0
BIT 5
Insert
AIS
Rx DS1
Channel 1
R/W
0
BIT 4
Insert
AIS
Rx DS1
Channel 0
R/W
0
BIT 3
Insert
AIS
Tx DS1
Channel 3
R/W
1
BIT 2
Insert
AIS
Tx DS1
Channel 2
R/W
1
BIT 1
Insert
AIS
Tx DS1
Channel 1
R/W
1
BIT 0
Insert
AIS
Tx DS1
Channel 0
R/W
1
The XRT72L13 also contains “M12 DS2 AIS” Regis-
ters, which corresponds to the remaining M12 MUX
blocks. Each of these registers also provide bit-fields
which permits the user to configure these M12 MUX
blocks to overwrite any of these E1 channels with an
E1 AIS pattern.
5.2.1.1.2.5 Forcing the “G.747 AIS” Pattern
M23 TX DS2 AIS REGISTER (ADDRESS = 0X08)
In addition to being able to transmit an E1 AIS pat-
tern, the XRT72L13 also permits the user to force the
transmission of a “G.747 AIS” pattern.
This can be accomplished by setting the appropriate
bit-field, within the “M23 TX DS2 AIS” register (Ad-
dress = 0x08) to “1”.
BIT 7
Not Used
R/O
0
BIT 6
TxDS2 AIS
Channel 6
R/W
0
BIT 5
TxDS2 AIS
Channel 5
R/W
0
BIT 4
TxDS2 AIS
Channel 4
R/W
0
BIT 3
TxDS2 AIS
Channel 3
R/W
0
BIT 2
TxDS2 AIS
Channel 2
R/W
0
BIT 1
TxDS2 AIS
Channel 1
R/W
0
BIT 0
TxDS2 AIS
Channel 0
R/W
0
5.2.1.1.3 DS2 “Pass-Thru” Mode Operation of the M12 MUX
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