XRT72L13 Datasheet, PDF (101/370 Pages) Exar Corporation – M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

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PRELIMINARY
M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC XRT72L13
REV. 1.0.6
Setting this bit-field to “1” enables the “Remote Loop-
back” Mode.
Bit 2 - Tributary Polarity
This “Read/Write” bit-field permits the user to select
the clock edge at which (a) the XRT72L13 M13 de-
vice will sample and latch the “Transmit DS1/E1” and
Transmit HDLC data, and (b) the XRT72L13 will out-
put the “Receive DS1/E1” and Receive HDLC data.
Setting this bit-field to “0” configures the XRT72L13
M13 device to (a) sample and latch the “Transmit
DS1/E1” and “Transmit HDLC” data on the rising
edge of the appropriate clock signal; and (b) to output
the “Receive DS1/E1” and “Receive HDLC” data on
the rising edge of the appropriate clock signal.
Setting this bit-field to “1” configures the XRT72L13
M13 device to (a) sample and latch the “Transmit
DS1/E1” and “Transmit HDLC” data on the falling
edge of the appropriate clock signal; and (b) to output
the “Receive DS1/E1” and “Receive HDLC” data on
the falling edge of the appropriate clock signal.
Bits 1 and 0 - M23LBCode[1, 0]
NOTES:These two “Read/Write” bits permit the user to
define which “C-bit” pattern (in the inbound DS3 data
stream) will function as the loopback command. these reg-
ister bits are only used if the XRT72L13 M13 device is oper-
ating in the “M13” Framing Format. These register bits are
ignored if the XRT72L13 M13 device is operating in the “C-
Bit Parity” Framing Format.
The following table related the contents of these two
bit-fields to the “M23 Loopback” code.
A more detailed description of these loopback codes
will be presented in Section _.
TABLE 5:
M23LB
CODE[1]
0
0
1
1
M23 LB
CODE[0]
0
1
0
1
RESULTING “M23” LOOPBACK CODE
Cj1 = Cj2 = *Cj3
Cj1 = *Cj2 = Cj3
*Cj1 = Cj2 = Cj3
Cj1 = Cj2 = *Cj3
2.3.2.10 M23 DS3 AIS Register
M23 TX DS2 AIS REGISTER (ADDRESS = 0X08)
BIT 7
Not Used
R/O
0
BIT 6
TxDS2 AIS
Channel 6
R/W
0
BIT 5
TxDS2 AIS
Channel 5
R/W
0
BIT 4
TxDS2 AIS
Channel 4
R/W
0
BIT 3
TxDS2 AIS
Channel 3
R/W
0
BIT 2
TxDS2 AIS
Channel 2
R/W
0
BIT 1
TxDS2 AIS
Channel 1
R/W
0
BIT 0
TxDS2 AIS
Channel 0
R/W
0
Bits 6 thru 0 - TxDS2 AIS Channel[6:0]
These seven (7) “Read/Write” bit-fields permits the
user to specify which “outbound” DS2 channel will
transmit an AIS (All Ones) pattern.
For example, setting “Bit 5” (within this register) to “1”
configures the XRT72L13 M13 device to transmit an
AIS pattern via the “outbound” (Transmit) DS2 Chan-
nel 5. In this mode, the content of the lower tributary
“TxDS1/E1” signals will be over-written by this AIS
pattern.
Setting “Bit 5” to “0” configures the “Transmit” DS2
Channel 5 to carry normal traffic (as determined by
the lower DS1 or E1 tributaries).
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