C8051F54X_14 Datasheet, PDF (82/275 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F54x
SFR Definition 10.3. SP: Stack Pointer
Bit
7
6
5
4
3
2
1
0
Name
SP[7:0]
Type
R/W
Reset
0
0
0
0
0
1
1
1
SFR Address = 0x81; SFR Page = All Pages
Bit Name
Function
7:0 SP[7:0] Stack Pointer.
The Stack Pointer holds the location of the top of the stack. The stack pointer is incre-
mented before every PUSH operation. The SP register defaults to 0x07 after reset.
SFR Definition 10.4. ACC: Accumulator
Bit
7
6
5
4
3
2
1
0
Name
ACC[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xE0; SFR Page = All Pages; Bit-Addressable
Bit Name
Function
7:0 ACC[7:0] Accumulator.
This register is the accumulator for arithmetic operations.
SFR Definition 10.5. B: B Register
Bit
7
6
5
4
3
2
1
0
Name
B[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xF0; SFR Page = All Pages; Bit-Addressable
Bit Name
Function
7:0 B[7:0] B Register.
This register serves as a second accumulator for certain arithmetic operations.
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Rev. 1.1