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C8051F54X_14 Datasheet, PDF (149/275 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family
C8051F54x
18.1.3. Interfacing Port I/O in a Multi-Voltage System
All Port I/O are capable of interfacing to digital logic operating at a supply voltage higher than VDD and less
than 5.25 V. Connect the VIO pin to the voltage source of the interface logic.
18.2. Assigning Port I/O Pins to Analog and Digital Functions
Port I/O pins P0.0–P3.0 can be assigned to various analog, digital, and external interrupt functions. The
Port pins assigned to analog functions should be configured for analog I/O, and Port pins assigned to digi-
tal or external interrupt functions should be configured for digital I/O.
18.2.1. Assigning Port I/O Pins to Analog Functions
Table 18.1 shows all available analog functions that require Port I/O assignments. Port pins selected for
these analog functions should have their corresponding bit in PnSKIP set to 1. This reserves the pin
for use by the analog function and does not allow it to be claimed by the Crossbar. Table 18.1 shows the
potential mapping of Port I/O to each analog function.
Table 18.1. Port I/O Assignment for Analog Functions
Analog Function
Potentially Assignable
Port Pins
SFR(s) used for
Assignment
ADC Input
P0.0–P3.0*
ADC0MX, PnSKIP
Comparator0 or Compartor1 Input
P0.0–P2.7*
CPT0MX, CPT1MX,
PnSKIP
Voltage Reference (VREF0)
P0.0
REF0CN, PnSKIP
External Oscillator in Crystal Mode (XTAL1)
P0.2
OSCXCN, PnSKIP
External Oscillator in RC, C, or Crystal Mode (XTAL2)
P0.3
OSCXCN, PnSKIP
*Note: P2.2-P2.7, P3.0 are only available on the 32-pin packages
18.2.2. Assigning Port I/O Pins to Digital Functions
Any Port pins not assigned to analog functions may be assigned to digital functions or used as GPIO. Most
digital functions rely on the Crossbar for pin assignment; however, some digital functions bypass the
Crossbar in a manner similar to the analog functions listed above. Port pins used by these digital func-
tions and any Port pins selected for use as GPIO should have their corresponding bit in PnSKIP set
to 1. Table 18.2 shows all available digital functions and the potential mapping of Port I/O to each digital
function.
Table 18.2. Port I/O Assignment for Digital Functions
Digital Function
Potentially Assignable Port Pins
UART0, SPI0, SMBus, LIN0,
CP0, CP0A, CP1, CP1A,
SYSCLK, PCA0 (CEX0-5
and ECI), T0 or T1.
Any Port pin available for assignment by the
Crossbar. This includes P0.0–P3.0* pins which
have their PnSKIP bit set to 0.
Note: The Crossbar will always assign UART0 pins
to P0.4 and P0.5.
*Note: P2.2-P2.7, P3.0 are only available on the 32-pin packages.
SFR(s) used for
Assignment
XBR0, XBR1, XBR2
Rev. 1.1
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