C8051F54X_14 Datasheet, PDF (184/275 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F54x
LIN Register Definition 19.8. LIN0SIZE: LIN0 Message Size Register
Bit
7
6
5
4
3
2
1
0
Name ENHCHK
LINSIZE[3:0]
Type R/W
R
R
R
R/W
Reset
0
0
0
0
0
0
0
0
Indirect Address = 0x0B
Bit
Name
Function
7 ENHCHK Checksum Selection Bit.
0: Use the classic, specification 1.3 compliant checksum. Checksum covers the
data bytes.
1: Use the enhanced, specification 2.0 compliant checksum. Checksum covers data
bytes and protected identifier.
6:4 Unused Read = 000b; Write = Don’t Care
3:0 LINSIZE[3:0] Data Field Size.
0000: 0 data bytes
0001: 1 data byte
0010: 2 data bytes
0011: 3 data bytes
0100: 4 data bytes
0101: 5 data bytes
0110: 6 data bytes
0111: 7 data bytes
1000: 8 data bytes
1001-1110: RESERVED
1111: Use the ID[1:0] bits (LIN0ID[5:4]) to determine the data length.
184
Rev. 1.1