C8051F54X_14 Datasheet, PDF (59/275 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F54x
SFR Definition 6.3. ADC0MX: ADC0 Channel Select
Bit
7
6
5
4
3
2
1
0
Name
ADC0MX[5:0]
Type
R
R
R/W
Reset
0
0
1
1
1
1
1
1
SFR Address = 0xBB; SFR Page = 0x00;
Bit Name
Function
7:6 Unused Read = 00b; Write = Don’t Care.
5:0 AMX0P[5:0] AMUX0 Positive Input Selection.
000000:
P0.0
000001:
P0.1
000010:
P0.2
000011:
P0.3
000100:
P0.4
000101:
P0.5
000110:
P0.6
000111:
P0.7
001000:
P1.0
001001:
P1.1
001010:
P1.2
001011:
P1.3
001100:
P1.4
001101:
P1.5
001110:
P1.6
001111:
P1.7
010000:
P2.0
010001:
P2.1
010010:
P2.2 (Only available on 32-pin package devices)
010011:
P2.3 (Only available on 32-pin package devices)
010100:
P2.4 (Only available on 32-pin package devices)
010101:
P2.5 (Only available on 32-pin package devices)
010110:
P2.6 (Only available on 32-pin package devices)
010111:
P2.7 (Only available on 32-pin package devices)
011000:
P3.0 (Only available on 32-pin package devices)
011001–101111: Reserved
110000:
Temp Sensor
110001:
110010–111111:
V_DD
GND
Rev. 1.1
59