C8051F54X_14 Datasheet, PDF (173/275 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F54x
SYSCLK
(MHz)
25
24.5
24
22.1184
16
12.25
12
11.0592
8
Table 19.2. Manual Baud Rate Parameters Examples
Baud (bits/sec)
20 K
19.2 K
9.6 K
4.8 K
0 1 312 0 1 325 1 1 325 3 1 325
0 1 306 0 1 319 1 1 319 3 1 319
0 1 300 0 1 312 1 1 312 3 1 312
0 1 276 0 1 288 1 1 288 3 1 288
0 1 200 0 1 208 1 1 208 3 1 208
0 0 306 0 0 319 1 0 319 3 0 319
0 0 300 0 0 312 1 0 312 3 0 312
0 0 276 0 0 288 1 0 288 3 0 288
0 0 200 0 0 208 1 0 208 3 0 208
1K
19 1 312
19 1 306
19 1 300
19 1 276
19 1 200
19 0 306
19 0 300
19 0 276
19 0 200
19.2.4. Baud Rate Calculations—Automatic Mode
If the LIN controller is configured for slave mode, only the prescaler and divider need to be calculated:
prescaler
=
ln
S-----Y----S-----C----L----K--
4000000
 ---1----- – 1
ln2
divider = -2---_---p---r---e---s----c---Sa----lY-e---S-r----+C-----1L---K_----_------2---0----0---0---0--
The following example calculates the values of these variables for a 24 MHz system clock:
prescaler
=
ln
2----4---0----0---0---0----0---0--
4000000
 ---1----- – 1 = 1.585  1
ln2
divider = -2---_--1----2-+--4---1-0---0_---0-_---0---20---00---0----0---0-- = 300
Table 19.3 presents some typical values of system clock and baud rate along with their factors.
Rev. 1.1
173