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C8051F54X_14 Datasheet, PDF (13/275 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family
C8051F54x
1. System Overview
C8051F54x devices are fully integrated mixed-signal System-on-a-Chip MCUs. Highlighted features are
listed below. Refer to Table 2.1 for specific product feature selection and part ordering numbers.
 High-speed pipelined 8051-compatible microcontroller core (up to 50 MIPS)
 In-system, full-speed, non-intrusive debug interface (on-chip)
 LIN 2.1 peripheral (fully backwards compatible, master and slave modes) (C8051F540/2/4/6)
 True 12-bit 200 ksps 32-channel single-ended ADC with analog multiplexer
 Precision programmable 24 MHz internal oscillator that is within ±0.5% across the temperature range
and for VDD voltages greater than or equal to the on-chip voltage regulator minimum output at the low
setting. The oscillator is within +1.0% for VDD voltages below this minimum output setting.
 On-chip Clock Multiplier to reach up to 50 MHz
 16 kB (C8051F540/1/2/3) or 8 kB (C8051F544/5/6/7) of on-chip Flash memory
 1280 bytes of on-chip RAM
 SMBus/I2C, Enhanced UART, and Enhanced SPI serial interfaces implemented in hardware
 Four general-purpose 16-bit timers
 Programmable Counter/Timer Array (PCA) with six capture/compare modules and Watchdog Timer
function
 On-chip Voltage Regulator
 On-chip Power-On Reset, VDD Monitor, and Temperature Sensor
 On-chip Voltage Comparator
 25 or 18 Port I/O (5 V push-pull)
With on-chip Voltage Regulator, Power-On Reset, VDD monitor, Watchdog Timer, and clock oscillator, the
C8051F54x devices are truly stand-alone System-on-a-Chip solutions. The Flash memory can be repro-
grammed even in-circuit, providing non-volatile data storage, and also allowing field upgrades of the 8051
firmware. User software has complete control of all peripherals, and may individually shut down any or all
peripherals for power savings.
The on-chip Silicon Labs 2-Wire (C2) Development Interface allows non-intrusive (uses no on-chip
resources), full speed, in-circuit debugging using the production MCU installed in the final application. This
debug logic supports inspection and modification of memory and registers, setting breakpoints, single
stepping, run and halt commands. All analog and digital peripherals are fully functional while debugging
using C2. The two C2 interface pins can be shared with user functions, allowing in-system debugging with-
out occupying package pins.
The devices are specified for 1.8 V to 5.25 V operation over the automotive temperature range (–40 to
+125 °C). The C8051F540/1/4/5 devices are available in 32-pin QFP and QFN packages and the
C8051F542/3/6/7 devices are available in 32-pin QFN packages. All package options are lead-free and
RoHS compliant. See Table 2.1 for ordering information. Block diagrams are included in Figure 1.1 and
Figure 1.2.
Rev. 1.1
13