DS89C420-QCL Datasheet, PDF (97/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
Internal Memory Cycles
XTAL1
ALE
PSEN
Port 0
Port 2
Ext Memory Cycle
C1 C2 C3 C4
Ext Memory Cycle
C1 C2 C3 C4
LSB Add Data LSB Add
Data
MSB Add
MSB Add
Figure 10-3. External Program Memory Access (Nonpage Model)
PORT 2
Port 2 is an 8-bit bidirectional I/O port. The reset condition sets the port pins to logic 1. In this state, a weak pullup holds the port pin
high. This condition also serves as an input mode, since any external circuit that writes to the port overcomes the weak pullup. Writing
a logic 0 to the port pin activates a strong pulldown that remains on until a 1 is written or a reset occurs. Writing a logic 1 after the port
has been at 0 causes a strong transition driver to turn on, followed by a weaker sustaining pullup. Once the momentary strong driver
turns off, the pin assumes both the output high and input state. As an alternate function, port 2 can function as the MSB of the address
bus for external memory access during nonpage mode. When used in page mode 1, P2 is used for both LSB and MSB of external
address. When used in page mode 2, P2 is used for the MSB of external address and data.
PORT 1
Port 1 functions as both an 8-bit bidirectional I/O port and an alternate functional interface for timer 2 I/O, external interrupts 2, 3, 4, 5,
and serial port 1. Reset conditions set these port pins to logic 1 and are held high with weak pullups. This condition also serves as an
input mode, since any external circuit that writes to the port overcomes the weak pullup. When a logic 0 is written to any port pin, the
port activates a strong pulldown that remains on until a 1 is written or a reset occurs. Writing a logic 1 after the port has been a 0 caus-
es a strong transition driver to turn on, followed by a weaker sustaining pullup. Once the momentary strong driver turns off, the pin
assumes both the output high and input state.
PORT 3
Port 3 functions as both an 8-bit bidirectional I/O port and an alternate functional interface for external interrupts 0 and 1, serial port 0,
timers 0 and 1 inputs, and external data memory strobes. The reset condition sets all bits to logic 1. In this state, a weak pullup holds
the port high. This condition also serves as an input mode, since any external circuit that writes to the port overcomes the weak pullup.
Writing a logic 0 to any port pin activates a strong pulldown that remains on until a 1 is written or a reset occurs. Writing a logic 1 after
the port has been a 0 causes a strong transition driver to turn on, followed by a weaker sustaining pullup. Once the momentary strong
driver turns off, the pin assumes both the output high and input state.
Alternate Functions of Ports 1 and 3
When any of the pins of ports 1 and 3 is enabled as a special function, the port latch should be programmed to logic 1 to avoid poten-
tial bus contention and ensure proper operation. The drive characteristics of these pins do not change when the pins are used for gen-
eral I/O or as a special function associated with the pin. port 0 and 2 pins, as well as PSEN, ALE, P3.6 and P3.7, incorporate special
circuitry to limit the current consumed by the device.
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