DS89C420-QCL Datasheet, PDF (69/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
Figures 6-9 and 6-10 below show data memory interconnect examples for page mode 1 and page mode 2.
ALE
PORT 2
DS89C4x0
PORT 0
RD (P3.7)
WR (P3.6)
Figure 6-9. Data Memory Interconnect (Page Mode 1)
CK
74F373
LATCH
MSB ADDRESS ₍₈₎
LSB ADDRESS (8)
DATA BUS
(8)
64kB X 8
SRAM
CE
OE
WE
ALE
PORT 2
DS89C4x0
PORT 0
RD ^(P3.7)
WR (P3.6)
CK
74F373
LATCH
MSB ADDRESS ₍₈₎
DATA BUS
(8)
LSB ADDRESS (8)
64kB X 8
SRAM
CE
OE
WE
Figure 6-10. Data Memory Interface (Page Mode 2)
The following pages provide timing diagrams to illustrate the external data memory timing for the nonpage and page mode external
bus structures.
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