DS89C420-QCL Datasheet, PDF (89/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
RING OSCILLATOR RESUME FROM STOP
To achieve the minimum power consumption during periods of processor inactivity, software can place the device into stop mode. Such
systems typically resume operation using an external interrupt, perform some activity, and then return to stop mode. Traditional designs
that rely upon an external crystal as the clock source must incur the startup delay of the crystal when resuming from stop mode. This
is a waste of time and power, as no work can be performed until the crystal has stabilized.
Although the ring oscillator provides an approximately 10MHz clock source for device operation, it is not as stable as an external crys-
tal. As a result, high-accuracy timing operations should be avoided while running from the ring oscillator. This includes using the timers
for pulse measurement, and the use of the serial ports in asynchronous modes (1, 2, 3). Serial ports operating in mode 0 are unaf-
fected by the stability of the clock source as a separate synchronizing clock is generated.
If the ring oscillator select bit RGSL, (EXIF.1) is set, the device resumes operation immediately using the internal ring oscillator as the
clock source. The device continues to run from the ring oscillator until the crystal warmup period of 65,536 clock cycles (measured
from the external source) has completed. At this time, the device switches to clock source active before it enters stop mode and con-
tinues operation. This allows software execution to begin immediately upon resuming from stop mode. The current clock source is indi-
cated by the ring oscillator mode bit, RGMD (EXIF.2). In stop mode, enabled interrupts become true edge triggered interrupts, com-
pared with the sampled edge detection used during normal operation. This means that external interrupts are more sensitive to noise
in stop mode than during normal operation. Applications should be carefully designed to ensure that noise will not cause an erroneous
exit from stop mode.
SECTION 8: RESET CONDITIONS
The condition that causes the microcontroller to vector to address 0000h is a reset. This can happen internally or external to the micro-
controller. The reset condition puts the microcontroller in a known state following a course of events not anticipated by the designer.
The circuit could be subjected to numerous conditions, such as power brownout, noise due to lightning strike, or corrupted code.
RESET SOURCES
The microcontroller can enter a reset condition if invoked in one of five ways:
• Power-on/power-fail reset
• Watchdog timer reset
• Oscillator-fail detect reset
• Internal system reset
• External reset
The reset state is the same, regardless of the source of the reset. When in reset, the oscillator is running, but no program execution is
allowed. When the reset source is external, the user must remove the reset stimulus to continue operation. When power is applied to
the device, the power-on delay removes the stimulus automatically.
Power-On/Power-Fail Reset
The ultra-high-speed flash microcontroller incorporates an internal voltage reference, which holds the device in power-on reset while
V_CC is out of tolerance. Once V_CC has risen above the threshold, the device restarts the external crystal oscillator and counts 65,536
clock cycles before program execution begins at location 0000h. The power monitor invokes a reset state when V_CC drops below the
threshold condition. The condition remains in effect while power is below the minimum voltage level. When power returns above the
reset threshold, a full power-on reset is performed. This mechanism provides a controlled and predictable startup condition.
The processor exits the reset condition automatically once V_CC meets the minimum voltage requirement. This helps the system main-
tain reliable operation by only permitting processor operation when voltage is in a known good state. Software can determine that a
power-on reset has occurred by checking the power-on reset flag (POR) in the WDCON register. Software should clear the POR bit
after it is read.
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