DS89C420-QCL Datasheet, PDF (71/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
PAGE MODE 1 DATA MEMORY TIMING–PAGES 1:0 = 10b (FOUR CYCLES)
The first diagram below shows execution of the MOVX instruction from internal program memory with stretch value = 0 assigned
(MD2:0 = 000b). Note that the internal memory cycles consist of one system clock while the external memory cycles consist of four
system clocks (page hit) or eight system clocks (page miss).
The second diagram illustrates the same MOVX instruction with a default stretch value (MD2:0 = 001b). The stretch cycle (four system
clocks) is distributed as follows: one system clock added for address setup, two system clocks being added to the RD or WR pulse
duration, and one system clock added for address/data hold. For subsequent stretch values of 2 or 3, the full stretch cycle is added
to the duration of the RD or WR pulse.
FOUR-CYCLE PAGE MODE 1: MOVX (TWO CYCLES)
SYSCLK
ALE
PSEN
WR /RD
PORT2
MOVX MSB
MOVX LSB
PORT0
DATA
MOVX INST
MOVX Data Access
(Page Miss)
INSTRUCTIONS
FOUR-CYCLE PAGE MODE 1: MOVX (THREE CYCLES)
SYSCLK
ALE
PSEN
WR /RD
PORT2
PORT0
MOVX INST
MOVX MSB
MOVX LSB
MOVX DATA
MOVX Data Access
(Page Miss + 1 Stretch Cycle)
INST INST
= STRETCH CYCLE
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