DS89C420-QCL Datasheet, PDF (131/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
SECTION 15: PROGRAM LOADING
The ultra-high-speed flash microcontroller family can perform program loading or reloading in a number of ways. First, ROM loader
mode can be invoked to create a serial communication channel, which permits in-system program/erase of the internal and external
program memory. Secondly, parallel programming mode allows programming and erasure of the internal flash memory using industry-
standard EPROM or flash parallel programmers.
ROM LOADER MODE
The ultra-high-speed flash microcontroller defaults to the normal operating (nonloader) mode without external hardware. ROM loader
mode can be invoked at any time, as described later in this section. Once the loader session is complete, the device performs a hard-
ware reset and begin operation. This is identical to an external reset, except that the ROM loader during the loader session may mod-
ify locations in scratchpad RAM in order to execute properly. The Table 15-1 shows which areas of scratchpad RAM are guaranteed
preserved and which ones are of indeterminate state after exiting the loader.
Table 15-1. Preserved and Indeterminate Scratchpad Memory
TYPE
Guaranteed Preserved
Indeterminate
ULTRA-HIGH-SPEED FLASH
MICROCONTROLLER
SCRATCHPAD MEMORY
80h–FFh
00h–7Fh
The guaranteed preserved locations are areas in scratchpad RAM that are not changed by the ROM loader. The indeterminate area
contains various stacks and buffers used by the loader, and a given byte in this area may or may not be modified by the loader. As
such, the user should not rely on the loader preserving any data in this area.
It should also be noted that the loader, upon being invoked, clears the EWT bit (WDCON.1) so that the watchdog timer is prevented
from generating an internal reset during the loader session.
Invoking the ROM Loader Mode
The ROM loader mode is invoked by simultaneously applying a logic 1 to the RST pin, a logic 0 to the EA pin, and driving the PSEN
pin to a logic 0 level. If power were to cycle while the required input stimuli were present, the loader would be invoked on power-up.
When the ROM loader mode is invoked, the device awaits an incoming <CR> character (0Dh) on serial port 0 at a baud rate that can
be detected by the autobaud routine. The autobaud routine is described later in this section. The autobaud routine receives and trans-
mits data only on serial port 0, ignoring activity on serial port 1. Upon successful baud-rate detection, the ROM loader transmits a ban-
ner similar to the one shown below, signaling to the host that loader mode has successfully been invoked. The banner is followed by
a “>” prompt, which indicates the device is ready to receive a command. The command set recognizable by the ROM loader is also
detailed later in this section. The flow of these conditions is shown in Figure 15-1. Application Note 3262: In-System Programming with
8051-Based Microcontrollers contains more information on the use of the ROM loader as well as tips on debugging potential problems.
Exiting the Loader
To exit ROM loader mode, first float the PSEN signal, and then float or drive the RST pin low. The RST pin has an internal pulldown. The
PSEN signal is an output and drives itself high. When the loader stimulus is removed, the processor performs a hardware reset and
begin execution at location 0000h. Note that both of these conditions must occur, or the loader is exited. The flow of these conditions
is shown in Figure 15-1.
Serial Program Load Operation
Program loading through a serial port is a convenient method of loading application software into the flash memory or external mem-
ory. Communication is performed over a standard, asynchronous serial communications port using a terminal emulator program with
8-N-1 (8 data bits, no parity, 1 stop bit) protocol settings. A typical application would use a simple RS-232 serial interface to in-system
program the device as part of a final production procedure.
The hardware configuration for the serial program load operation is illustrated in Figure 15-2. A variety of crystals can be used to pro-
duce standard baud rates. The ROM is designed to operate across a 3-wire interface from a standard UART. The receive, transmit,
and ground wires are all that are necessary to establish communication with the device.
The ROM implements an easy-to-use command line interface, which allows an Intel hex file to be loaded and read back from the
device. Intel hex is the standard format output by 8051 cross-assemblers.
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