DS89C420-QCL Datasheet, PDF (130/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
MNEMONIC
JC rel
JNC rel
JB bit, rel
JNB bit, rel
JBC bit, rel
INSTRUCTION CODE
D7 D6 D5 D4 D3 D2 D1 D0
0
1
0
0
0
0
0
0
r7
r6
r5
r4
r3
r2
r1
r0
0
1
0
1
0
0
0
0
r7
r6
r5
r4
r3
r2
r1
r0
0
0
1
0
0
0
0
0
b7 b6 b5 b4 b3 b2 b1 b0
r7
r6
r5
r4
r3
r2
r1
r0
0
0
0
1
0
0
0
0
b7 b6 b5 b4 b3 b2 b1 b0
r7
r6
r5
r4
r3
r2
r1
r0
0
0
0
1
0
0
0
0
b7 b6 b5 b4 b3 b2 b1 b0
r7
r6
r5
r4
r3
r2
r1
r0
HEX
40
Byte 2
50
Byte 2
20
Byte 2
Byte 3
30
Byte 2
Byte 3
10
Byte 2
Byte 3
BYTE
2
2
3
3
3
0
0
0
1
0
0
0
0
B5
CJNE A, direct, rel a7 a6 a5 a4 a3 a2 a1 a0
Byte 2
3
r7
r6
r5
r4
r3
r2
r1
r0
Byte 3
1
0
1
1
0
1
0
0
B4
CJNE A, #data, rel d7 d6 d5 d4 d3 d2 d1 d0
Byte 2
3
r7
r6
r5
r4
r3
r2
r1
r0
Byte 3
CJNE Rn,
#data, rel
1
0
1
1
1
n2 n1
n0
B8-BF
d7 d6 d5 d4 d3 d2 d1 d0
Byte 2
3
r7
r6
r5
r4
r3
r2
r1
r0
Byte 3
CJNE @Ri,
#data, rel
1
0
1
1
0
1
1
i
B6-B7
d7 d6 d5 d4 d3 d2 d1 d0
Byte 2
3
r7
r6
r5
r4
r3
r2
r1
r0
Byte 3
DJNZ Rn, rel
1
r7
1
r6
0
a5
r5
1
r4
1
n2 n1
n0
r3
r2
r1
r0
D8-Df
Byte 2
3
1
1
1
1
0
1
0
1
D5
DJNZ direct,rel
a7 a6 d5 a4 a3 a2 a1 a0
Byte 2
3
r7
r6
r5
r4
r3
r2
r1
r0
Byte 3
NOP
0
0
0
0
0
0
0
0
00
1
CYCLE
3
3
4
4
4*
5
4
4
5
4
5
1
EXPLANATION
(PC) = (PC) + 2
IF (C) = 1 THEN
(PC) = (PC) + rel
(PC) = (PC) + 2
IF (C) ≠ 0 THEN
(PC) = (PC) + rel
(PC) = (PC) + 3
IF (bit) = 1 THEN
(PC) = (PC) + rel
(PC) = (PC) + 3
IF (bit) = 0 THEN
(PC) = (PC) + rel
(PC) = (PC) + 3
IF (bit) = 1 THEN
(bit) = 0 and (PC) =
(PC) + rel
(PC) = (PC) + 3
IF (direct) < (A)
THEN (PC) = (PC)
+ rel and (C) = 0
OR
IF (direct) > (A)
THEN (PC) = (PC)
+ rel and (C) = 1
(PC) = (PC) + 3
IF #data < (A)
THEN (PC) = (PC)
+ rel and (C) = 0
OR
IF #data > (A)
THEN (PC) = (PC)
+ rel and (C) = 1
(PC) = (PC) + 3
IF #data < (Rn)
THEN (PC) = (PC)
+ rel and (C) = 0
OR
IF #data > (Rn)
THEN (PC) = (PC)
+ rel and (C) = 1
(PC) = (PC) + 3
IF #data < ((Ri))
THEN (PC) = (PC)
+ rel and (C) = 0
OR
IF #data > ((Ri))
THEN (PC) = (PC)
+ rel and (C) = 1
(PC) = (PC) + 2
(Rn) = (Rn) - 1
IF (Rn) ≠ 0 THEN
(PC) = (PC) + rel
(PC) = (PC) + 3
(direct) = (direct) - 1
IF (direct) ≠ 0 THEN
(PC) = (PC) + rel
(PC) = (PC) + 1
* Note: One additional clock cycle is required if the PSW, SP, DPS, IE, EIE, IP0, IP1, EIP0, or EIP1 register is accessed by certain direct
addressing instructions marked with an *. Additionally, the JBC bit instruction requires one additional clock cycle to clear a bit if the
jump is actually taken.
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