DS89C420-QCL Datasheet, PDF (17/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
Data Pointer Low 1 (DPL1)
7
6
5
4
3
2
1
0
SFR 84h
DPL1.7
DPL1.6
DPL1.5
DPL1.4
DPL1.3
DPL1.2
DPL1.1
DL1H.0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
DPL1.7–0
Data Pointer Low 1. This register is the low byte of the auxiliary 16-bit data pointer. When the SEL
Bits 7–0
bit (DPS.0) is set, DPL1 and DPH1 are used in place of DPL and DPH during DPTR operations.
Data Pointer High 1 (DPH1)
7
6
5
SFR 85h
DPH1.7
DPH1.6
DPH1.5
RW-0
RW-0
RW-0
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
4
DPH1.4
RW-0
3
DPH1.3
RW-0
2
DPH1.2
RW-0
1
DPH1.1
RW-0
0
DPH1.0
RW-0
DPH1.7–0
Bits 7–0
Data Pointer Low 1. This register is the high byte of the auxiliary 16-bit data pointer. When the SEL
bit (DPS.0) is set, DPL1 and DPH1 are used in place of DPL and DPH during DPTR operations.
Data Pointer Select (DPS)
7
6
5
4
3
2
1
0
SFR 86h
ID1
ID0
TSL
AID
—
—
—
SEL
RW-0
RW-0
RW-0
R-0
R-0
R-1
R-0
RW-0
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
ID1
Bit 7
Increment/Decrement Select for DPTR1. This bit determines the effect of the INC DPTR instruction
on DPTR1 when selected (SEL = 1) as the active data pointer.
0 = INC DPTR increments DPTR1 (default)
1 = INC DPTR decrements DPTR1
ID0
Bit 6
Increment/Decrement Select for DPTR. This bit determines the effect of the INC DPTR instruction
on DPTR when selected (SEL = 0) as the active data pointer.
0 = INC DPTR increments DPTR (default)
1 = INC DPTR decrements DPTR
TSL
Bit 5
Toggle Select. When clear (= 0), DPTR-related instructions do not affect the SEL bit. When set (= 1),
the SEL bit is toggled following execution of any of the below DPTR-related instructions:
INC DPTR
MOV DPTR, #data16
MOVC A, @A+DPTR
MOVX A, @DPTR
MOVX @DPTR, A
AID
Bit 4
Autoincrement/Decrement Enable. When set, the active data pointer is automatically incremented
or decremented (as determined by ID1, ID0 bit settings) following execution of any of the below
DPTR-related instructions:
MOVC A, @A+DPTR
MOVX A, @DPTR
MOVX @DPTR, A
Bits 3, 2, 1
Reserved. These bits read 010b.
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