DS89C420-QCL Datasheet, PDF (5/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
SECTION 1: INTRODUCTION
Dallas Semiconductor’s ultra-high-speed flash microcontroller is
an 8051-compatible microcontroller that provides improved per-
formance and power consumption when compared to the origi-
nal 8051 version. It retains instruction set and object code com-
patibility with the 8051, yet performs the same operations in
fewer clock cycles. Consequently, greater throughput is possible
for the same crystal speed. As an alternative, the device can be
run at a reduced frequency to save power. The more efficient
design allows a much slower crystal speed to get the same
results as an original 8051, using much less power.
The fundamental innovation of the ultra-high-speed flash micro-
controller is the use of only one clock per instruction cycle com-
pared with 12 for the original 8051. This results in up to 12 times
improvement in performance over the original 8051 architecture
and up to four times improvement over other Dallas
Semiconductor high-speed microcontrollers. The device pro-
vides several peripherals and features in addition to all of the
standard features of an 80C32. These include 16kB/32kB/64kB of
on-chip flash memory, 1kB of on-chip RAM, four 8-bit I/O ports,
three 16-bit timer/counters, two on-chip UARTs, dual data pointers,
an on-chip watchdog timer, five levels of interrupt priority, and a
crystal multiplier. The device provides 256 bytes of RAM for vari-
ables and stack; 128 bytes can be reached using direct or indirect
addressing, or using indirect addressing only.
In addition to improved efficiency, it can operate at a maximum
clock rate of 33MHz. Combined with the 12 times performance,
this allows for a maximum performance of 33 million instructions
per second (MIPs). This level of computing power is comparable
to many 16-bit processors, but without the added expense and
complexity if implementing a 16-bit interface.
The device incorporates a power-management mode that allows
the device to dynamically vary the internal clock speed from 1
clock per cycle (default) to 1024 clocks per cycle. Because power
consumption is directly proportional to clock speed, the device
can reduce its operating frequency during periods of little switch-
back. This greatly reduces power consumption. The switchback
feature allows the device to quickly return to highest speed oper-
ation upon receipt of an interrupt or serial port activity, allowing the
device to respond to external events while in power-management
mode.
SECTION 2: ORDERING INFORMATION
The ultra-high-speed flash microcontroller family follows the part numbering convention shown below. Note that not all combinations of
devices may be currently available. Contact a Maxim/Dallas Semiconductor sales office for up-to-date details.
DS89C420-QCL
SPEED:
L
33MHz
TEMPERATURE:
C
0°C to +70°C
N
-40°C to +85°C
PACKAGE:
M
PDIP
Q
PLCC
E
Thin Quad Flat Pack (TQFP)
OPERATING VOLTAGE: 0
+5V
MEMORY TYPE:
9
Flash
SECTION 3: ARCHITECTURE
The architecture is based on the industry-standard 87C52 and executes the standard 8051 instruction set. The core is an accumula-
tor-based architecture using internal registers for data storage and peripheral control. This section provides a brief description of each
architecture feature. Details concerning the programming model, instruction set, and register description are provided in Section 4.
ALU
The ALU is responsible for math functions, comparisons, and general decision making. The ALU is not used explicitly by software.
Instruction decoding prepares the ALU automatically and passes it the appropriate data. The ALU primarily uses two special-function
registers (SFRs) as the source and destination for all operations. These are the accumulator and B register. The ALU also provides sta-
tus information in the program status register. The SFRs are described in the following pages.
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