DS89C420-QCL Datasheet, PDF (11/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
Register Addressing
Register addressing is used for operands that are located in one of the eight working registers (R7–R0). The eight working registers
can be located in one of four working register banks found in the lower 32 bytes of scratchpad RAM, as determined by the current reg-
ister bank-select bits. A register bank is selected using two bits in the program status word (PSW;D0h). This addressing mode is pow-
erful, since it uses the active bank without knowing which bank is selected. Thus, one instruction can have multiple uses by simply
switching banks. Register addressing is also a high-speed instruction, requiring only one machine cycle. Two examples of register
addressing are provided below:
ADD
A, R4
;Add register R4 to Accumulator
INC
R2
;Increment the value in register R2
In the first case, the value in R4 is the source of the operation. In the latter, R2 is the destination. These instructions do not consider
the absolute address of the register. They act on whichever bank has been selected.
Any working register can also be accessed by direct addressing. In order to do this, the absolute address must be specified.
Direct Addressing
Direct addressing is the mode used to access the entire lower 128 bytes of scratchpad RAM and the SFR area. It is commonly used
to move the value in one register to another. Two examples are shown below:
MOV
72h, 74h
;Move the value in register 74 to
;register 72.
MOV
90h, 20h
;Move the value in register 20 to
;the SFR at 90h (Port 1)
Note that there is no instruction difference between a RAM access and an SFR access. The SFRs are register locations above 7Fh.
Direct addressing also extends to bit addressing. There is a group of instructions that explicitly use bits. The address information pro-
vided to such an instruction is the bit location, rather than the register address. Registers between 20h and 2Fh contain bits that are
individually addressable. SFRs that end in 0 or 8 are bit addressable. An example of direct bit addressing is as follows:
SETB 00h
MOV C, 0B7h
Register Indirect Addressing
;Set bit 00 in the RAM. This is the
;LSb of the register at address 20h
;as shown earlier in this section.
;Move the contents of bit B7 to the
;Carry flag. Bit B7 is the MSb of
;register B0 (Port 3).
This mode is used to access the scratchpad RAM locations above 7Fh. It can also be used to reach the lower RAM (0h–7Fh), if need-
ed. The address is supplied by the contents of the working register specified in the instruction. Thus, one instruction can be used to
reach many values by altering the contents of the designated working register. Note that, in general, only R0 and R1 can be used as
pointers. An example of register indirect addressing follows:
ANL A, @R0
;Logical AND the Accumulator
;with the contents of the register
;pointed to by the value stored in R0.
This mode is also used for stack manipulation. This is because all stack references are directed by the value in the stack pointer reg-
ister. The push and pop instructions use this method of addressing. An example is as follows:
PUSH
A
;Saves the contents of the
;accumulator on the stack.
Register indirect addressing is used for all off-chip data memory accesses. These involve the MOVX instruction. The pointer registers
can be R0, R1, DPTR0 and DPTR1. Both R0 and R1 reside in the working register area of the scratchpad RAM. They can be used to
reference a 256-byte area of off-chip data memory. When using this type of addressing, the upper address byte is supplied by the
value in the port 2 latch. This value must be selected by software prior to the MOVX instruction. An example is as follows:
MOVX
@R0, A
;Write the value in the accumulator
;to the address pointed to by R0 in
;the page pointed to by P2.
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