DS89C420-QCL Datasheet, PDF (39/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
RWT
Bit 0
Accumulator (A or ACC)
Reset Watchdog Timer. Setting this bit resets the watchdog timer count. This bit must be set
using a Timed Access procedure before the watchdog timer expires, or a watchdog timer reset
and/or interrupt is generated if enabled. The timeout period is defined by the Watchdog Timer
Mode Select bits (CKCON.7-6). This bit is always be 0 when read.
7
6
5
SFR E0h
ACC.7
ACC.6
ACC.5
RW-0
RW-0
RW-0
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
4
ACC.4
RW-0
3
ACC.3
RW-0
2
ACC.2
RW-0
1
ACC.1
RW-0
0
ACC.0
RW-0
ACC.7–0
Bits 7–0
Accumulator. This register serves as the accumulator for arithmetic operations.
Extended Interrupt Enable (EIE)
7
6
5
SFR E8h
—
—
—
R-1
R-1
R-1
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
4
EWDI
RW-0
3
EX5
RW-0
2
EX4
RW-0
1
EX3
RW-0
0
EX2
RW-0
Bits 7–5
EWDI
Bit 4
EX5
Bit 3
EX4
Bit 2
EX3
Bit 1
EX2
Bit 0
B Register (B)
Reserved. Read data is 1.
Watchdog Interrupt Enable. This bit enables/disables the watchdog interrupt.
0 = Disable the watchdog interrupt.
1 = Enable interrupt requests generated by the watchdog timer.
External Interrupt 5 Enable. This bit enables/disables external interrupt 5.
0 = Disable external interrupt 5.
1 = Enable interrupt requests generated by the INT5 pin.
External Interrupt 4 Enable. This bit enables/disables external interrupt 4.
0 = Disable external interrupt 4.
1 = Enable interrupt requests generated by the INT4 pin.
External Interrupt 3 Enable. This bit enables/disables external interrupt 3.
0 = Disable external interrupt 3.
1 = Enable interrupt requests generated by the INT3 pin.
External Interrupt 2 Enable. This bit enables/disables external interrupt 2.
0 = Disable external interrupt 2.
1 = Enable interrupt requests generated by the INT2 pin.
7
6
5
SFR F0h
B.7
B.6
B.5
RW-0
RW-0
RW-0
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
4
B.4
RW-0
3
B.3
RW-0
2
B.2
RW-0
1
B.1
RW-0
0
B.0
RW-0
B.7–0
Bits 7–0
B Register. This register serves as a second accumulator for certain arithmetic operations.
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