DS89C420-QCL Datasheet, PDF (113/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
Table 12-2. SFR Serial Port Operation Control
BIT NAMES
SM0/FE_0
SM1_0
SM2_0
REN_0
TB8_0
RB8_0
TI_0
RI_0
SMOD_0
RCLK
TCLK
DESCRIPTION
Serial mode select 0 or framing error
Serial mode select 1
Serial mode select 2
Receive enable
9th transmit data bit
9th receive data bit
Transmit interrupt flag
Receive interrupt flag
Baud-rate doubler bit
Timer 2 serial receive clock enable
Timer 2 serial transmit clock enable
Serial data buffer
Slave address
Slave address mask enable
SM0/FE_1
SM1_1
SM2_1
REN_1
TB8_1
RB8_1
TI_1
RI_1
SMOD_1
Serial mode select 0 or framing error
Serial mode select 1
Serial mode select 2
Receive enable
9th transmit data bit
9th receive data bit
Transmit interrupt flag
Receive interrupt flag
Baud-rate doubler bit
Serial data buffer
Slave address
Slave address mask enable
SMOD0
Enable framing error detection
REGISTER LOCATION
SCON0 – 98h
SCON0 – 98h
SCON0 – 98h
SCON0 – 98h
SCON0 – 98h
SCON0 – 98h
SCON0 – 98h
SCON0 – 98h
PCON – 87h
T2CON – C8h
T2CON – C8h
SBUF0 – 99h
SADDR0 – A9h
SADEN0 – B9h
SCON1 – C0h
SCON1 – C0h
SCON1 – C0h
SCON1 – C0h
SCON1 – C0h
SCON1 – C0h
SCON1 – C0h
SCON1 – C0h
WDCON – D8h
SBUF1 – C1h
SADDR1 – AAh
SADEN1 – BAh
PCON – 87h
BIT POSITIONS
SCON0.7
SCON0.6
SCON0.5
SCON0.4
SCON0.3
SCON0.2
SCON0.1
SCON0.0
PCON.7
T2CON.5
T2CON.4
SCON1.7
SCON1.6
SCON1.5
SCON1.4
SCON1.3
SCON1.2
SCON1.1
SCON1.0
WDCON.7
PCON.6
BAUD RATES
Each mode has a baud-rate generator associated with it. This generator is generally the same for each UART. Several of the baud-rate
generation techniques have options that are independent for the two UARTs. The following baud-rate descriptions are separated by
mode.
Mode 0
Mode 0 is synchronous, so the shift clock output frequency is the baud rate. Table 12-3 summarizes baud-rate generation as a func-
tion of the external oscillator frequency.
The default case is divide-by-12. The user can select the shift clock frequency using the SM2 bit in the associated SCON register. For
serial port 0, the SM2_0 bit is SCON0.5. For serial port 1, the SM2_0 bit is SCON1.5.
When SM2 is set to a logic 0, the baud rate is fixed at a divide-by-12 of the system clock frequency, unless power-management mode
is invoked. When operating in power-management mode, with the SM2 bit clear ( = 0), the serial port clock frequency is the oscillator
frequency divided by 3072.
When SM2 is set to a logic 1, the baud rate is generated using the system clock frequency divided by 4, unless power-management
mode is invoked. When power-management mode is used with the SM2 bit set ( = 1), the serial port clock frequency tracks the sys-
tem clock frequency. Note that this use of SM2 differs from a standard 80C32. In that device, SM2 had no valid use when the UART
was in mode 0. Since it was generally set to a zero, for the divide-by-12, there is no compatibility problem.
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