DS89C420-QCL Datasheet, PDF (16/139 Pages) Maxim Integrated Products – Ultra-High-Speed Flash Microcontroller User’s Guide

Ultra-High-Speed Flash
Microcontroller User’s Guide
SPECIAL-FUNCTION REGISTERS
Most of the unique features of the ultra-high-speed microcontroller family are controlled by bits in SFRs located in unused locations in
the 8051 SFR map. This allows for increased functionality while maintaining complete instruction set compatibility.
The description for each bit indicates its read and write access, as well as its state after a power-on reset.
Port 0 (P0)
SFR 80h
7
P0.7
RW-1
6
P0.6
RW-1
5
P0.5
RW-1
4
P0.4
RW-1
3
P0.3
RW-1
2
P0.2
RW-1
1
P0.1
RW-1
0
P0.0
RW-1
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
P0.7–0
Port 0. This port functions according to the table below where PAGEE = ACON.7 and PAGES =
ACON.6-5.
Port 0 Function
PAGEE
0
0
1
1
PAGES
XX
XX
00, 01, 10
11
PORT 0 FUNCTION
General-Purpose I/O (code execution < ROMSIZE.2-0)
Multiplexed Address LSB / Data (code execution > ROMSIZE.2-0)
Data
Address LSB
Stack Pointer (SP)
When serving as general-purpose I/O (GPIO), the port is open-drain and requires pullups. Writing
a 1 to one of the bits of this register configures the associated port 0 pin as an input. All read oper-
ations, with the exception of read-modify-write instructions, leave the port latch unchanged. During
external memory addressing and data memory write cycles, the port has high-and-low drive capa-
bility. During external memory data read cycles, the port is held in a high-impedance state.
7
6
5
SFR 81h
SP.7
SP.6
SP.5
RW-0
RW-0
RW-0
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
4
SP.4
RW-0
3
SP.3
RW-0
2
SP.2
RW-1
1
SP.1
RW-1
0
SP.0
RW-1
SP.7–0
Bits 7–0
Stack Pointer. This stack pointer is written by software to identify the location where the stack
begins. The stack pointer is incremented before every PUSH operation and is decremented fol-
lowing every POP operation. This register defaults to 07h after reset.
Data Pointer Low 0 (DPL)
7
6
5
SFR 82h
DPL.7
DPL.6
DPL.5
RW-0
RW-0
RW-0
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
4
DPL.4
RW-0
3
DPL.3
RW-0
2
DPL.2
RW-0
1
DPL.1
RW-0
0
DPL.0
RW-0
DPL.7–0
Bits 7–0
Data Pointer LOW 0. This register is the low byte of the standard 80C32 16-bit data pointer. DPL
and DPH are used to point to nonscratchpad data RAM.
Data Pointer High 0 (DPH)
7
6
5
4
3
2
1
0
SFR 83h
DPH.7
DPH.6
DPH.5
DPH.4
DPH.3
DPH.2
DPH.1
DPH.0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
DPH.7–0
Bits 7–0
Data Pointer High 0. This register is the high byte of the standard 80C32 16-bit data pointer. DPL
and DPH are used to point to nonscratchpad data RAM.
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