MC9S12P128 Datasheet, PDF (97/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

2.3.58 Port AD Data Register (PT1AD)
Port Integration Module (S12PPIMV1)
Address 0x0271
7
R
PT1AD7
W
6
PT1AD6
5
PT1AD5
4
PT1AD4
3
PT1AD3
2
PT1AD2
Altern.
Function
AN7
AN6
AN5
AN4
AN3
AN2
Reset
0
0
0
0
0
0
Figure 2-56. Port AD Data Register (PT1AD)
1. Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Access: User read/write⁽¹⁾
1
0
PT1AD1
PT1AD0
AN1
AN0
0
0
Table 2-52. PT1AD Register Field Descriptions
Field
Description
7-0
PT1AD
Port AD general purpose input/output data—Data Register, ATD AN analog input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
2.3.59 Port AD Data Direction Register (DDR0AD)
Address 0x0272
7
R
0
W
Reset
0
1. Read: Anytime
Write: Anytime
Access: User read/write⁽¹⁾
6
5
4
3
2
1
0
0
0
0
0
0
DDR0AD1 DDR0AD0
0
0
0
0
0
0
0
Figure 2-57. Port AD Data Direction Register (DDR0AD)
Table 2-53. DDR0AD Register Field Descriptions
Field
Description
1-0 Port AD data direction—
DDR0AD This bit determines whether the associated pin is an input or output.
To use the digital input function the ATD Digital Input Enable Register (ATDDIEN) has to be set to logic level “1”.
1 Associated pin is configured as output
0 Associated pin is configured as input
S12P-Family Reference Manual, Rev. 1.12
Freescale Semiconductor
97