MC9S12P128 Datasheet, PDF (52/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12PPIMV1)
Port Pin Name
Pin Function
& Priority⁽¹⁾
I/O
Description
M
PM5
SCK
I/O Serial Peripheral Interface serial clock pin
GPIO
I/O General purpose
PM4
MOSI
I/O Serial Peripheral Interface master out/slave in pin
GPIO
I/O General purpose
PM3
SS
I/O Serial Peripheral Interface slave select output in master mode,
input in slave mode or master mode.
GPIO
I/O General purpose
PM2
MISO
I/O Serial Peripheral Interface master in/slave out pin
GPIO
I/O General purpose
PM1
TXCAN
O MSCAN transmit pin
GPIO
I/O General purpose
PM0
RXCAN
I MSCAN receive
GPIO
I/O General purpose
P
PP7
GPIO/KWP7 I/O General purpose; with interrupt
PP5
PWM5
I/O Pulse Width Modulator channel 5; emergency shut-down
GPIO/KWP5 I/O General purpose; with interrupt
PP[4:0]
PWM[4:0]
O Pulse Width Modulator channel 4 - 0
GPIO/KWP[4:0] I/O General purpose; with interrupt
J
PJ[7:6]
GPIO/KWJ[7:6] I/O General purpose; with interrupt
PJ[2:0] GPIO/KWJ[2:0] I/O General purpose; with interrupt
AD PAD[9:0]
GPIO
I/O General purpose
AN[9:0]
I ATD analog
1. Signals in brackets denote alternative module routing pins.
2. Function active when RESET asserted.
Pin Function
after Reset
GPIO
GPIO
GPIO
GPIO
2.3 Memory Map and Register Definition
This section provides a detailed description of all Port Integration Module registers.
2.3.1 Memory Map
Table 2-2 shows the register map of the Port Integration Module.
Table 2-2. Block Memory Map
Port
Offset or
Address
Register
A 0x0000 PORTA—Port A Data Register
B
0x0001 PORTB—Port B Data Register
0x0002 DDRA—Port A Data Direction Register
0x0003 DDRB—Port B Data Direction Register
Access Reset Value Section/Page
R/W
0x00
R/W
0x00
R/W
0x00
R/W
0x00
2.3.3/2-63
2.3.4/2-63
2.3.5/2-64
2.3.6/2-64
S12P-Family Reference Manual, Rev. 1.12
52
Freescale Semiconductor