MC9S12P128 Datasheet, PDF (93/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

2.3.50 Port J Input Register (PTIJ)
Port Integration Module (S12PPIMV1)
Address 0x0269
7
6
5
4
3
2
R PTIJ7
PTIJ6
0
0
0
PTIJ2
W
Reset
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
1. Read: Anytime
Figure 2-48. Port J Input Register (PTIJ)
Write:Never, writes to this register have no effect.
Access: User read⁽¹⁾
1
PTIJ1
0
PTIJ0
u
u
Table 2-44. PTIJ Register Field Descriptions
Field
Description
7-6, 2-0
PTIJ
Port J input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
2.3.51 Port J Data Direction Register (DDRJ)
Address 0x026A
R
W
Reset
7
DDRJ7
0
1. Read: Anytime
Write: Anytime
6
5
4
3
2
0
0
0
DDRJ6
DDRJ2
0
0
0
0
0
Figure 2-49. Port J Data Direction Register (DDRJ)
Table 2-45. DDRJ Register Field Descriptions
Field
Description
7-6, 2-0 Port J data direction—
DDRJ This bit determines whether the associated pin is an input or output.
1 Associated pin is configured as output
0 Associated pin is configured as input
Access: User read/write⁽¹⁾
1
0
DDRJ1
DDRJ0
0
0
S12P-Family Reference Manual, Rev. 1.12
Freescale Semiconductor
93