MC9S12P128 Datasheet, PDF (72/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12PPIMV1)
Table 2-14. PTT Register Field Descriptions
Field
Description
7-6, 3-1
PTT
Port T general purpose input/output data—Data Register, TIM output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The TIM output function takes precedence over the general purpose I/O function if the related channel is enabled.
5
Port T general purpose input/output data—Data Register, TIM output, routed PWM output, VREG_API output
PTT When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The TIM output function takes precedence over the routed PWM, VREG_API function and the general purpose
I/O function if the related channel is enabled.
• The routed PWM function takes precedence over VREG_API and the general purpose I/O function if the related
channel is enabled.
• The VREG_API takes precedence over the general purpose I/O function if enabled.
4,0 Port T general purpose input/output data—Data Register, TIM output, routed PWM output
PTT When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The TIM output function takes precedence over the routed PWM and the general purpose I/O function if the
related channel is enabled.
• The routed PWM function takes precedence over the general purpose I/O function if the related channel is
enabled.
2.3.17 Port T Input Register (PTIT)
Address 0x0241
7
R PTIT7
6
PTIT6
5
PTIT5
4
PTIT4
3
PTIT3
2
PTIT2
W
Reset
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-15. Port T Input Register (PTIT)
1. Read: Anytime
Write:Never, writes to this register have no effect.
Access: User read⁽¹⁾
1
PTIT1
0
PTIT0
u
u
S12P-Family Reference Manual, Rev. 1.12
72
Freescale Semiconductor