MC9S12P128 Datasheet, PDF (439/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

128 KByte Flash Module (S12FTMRC128K1V1)
Offset Module Base + 0x0008
7
R
FPOPEN
W
6
RNV6
5
FPHDIS
4
3
FPHS[1:0]
2
FPLDIS
Reset
F
F
F
F
F
F
= Unimplemented or Reserved
Figure 13-13. Flash Protection Register (FPROT)
1
0
FPLS[1:0]
F
F
The (unreserved) bits of the FPROT register are writable with the restriction that the size of the protected
region can only be increased (see Section 13.3.2.9.1, “P-Flash Protection Restrictions,” and Table 13-20).
During the reset sequence, the FPROT register is loaded with the contents of the P-Flash protection byte
in the Flash configuration field at global address 0x3_FF0C located in P-Flash memory (see Table 13-3)
as indicated by reset condition ‘F’ in Figure 13-13. To change the P-Flash protection that will be loaded
during the reset sequence, the upper sector of the P-Flash memory must be unprotected, then the P-Flash
protection byte must be reprogrammed. If a double bit fault is detected while reading the P-Flash phrase
containing the P-Flash protection byte during the reset sequence, the FPOPEN bit will be cleared and
remaining bits in the FPROT register will be set to leave the P-Flash memory fully protected.
Trying to alter data in any protected area in the P-Flash memory will result in a protection violation error
and the FPVIOL bit will be set in the FSTAT register. The block erase of a P-Flash block is not possible
if any of the P-Flash sectors contained in the same P-Flash block are protected.
Table 13-16. FPROT Field Descriptions
Field
Description
7
FPOPEN
Flash Protection Operation Enable — The FPOPEN bit determines the protection function for program or
erase operations as shown in Table 13-17 for the P-Flash block.
0 When FPOPEN is clear, the FPHDIS and FPLDIS bits define unprotected address ranges as specified by the
corresponding FPHS and FPLS bits
1 When FPOPEN is set, the FPHDIS and FPLDIS bits enable protection for the address range specified by the
corresponding FPHS and FPLS bits
6
Reserved Nonvolatile Bit — The RNV bit should remain in the erased state for future enhancements.
RNV[6]
5
FPHDIS
Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory ending with global address 0x3_FFFF.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
4–3
Flash Protection Higher Address Size — The FPHS bits determine the size of the protected/unprotected area
FPHS[1:0] in P-Flash memory as shown inTable 13-18. The FPHS bits can only be written to while the FPHDIS bit is set.
2
FPLDIS
Flash Protection Lower Address Range Disable — The FPLDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory beginning with global address 0x3_8000.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
1–0
Flash Protection Lower Address Size — The FPLS bits determine the size of the protected/unprotected area
FPLS[1:0] in P-Flash memory as shown in Table 13-19. The FPLS bits can only be written to while the FPLDIS bit is set.
S12P-Family Reference Manual, Rev. 1.12
Freescale Semiconductor
439