MC9S12P128 Datasheet, PDF (519/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

A.3.1.13 Set Field Margin Level (FCMD=0x0E)
The maximum set field margin level time is given by:
t = 350 ⋅ _f---_N---_V----_M¹----_B---_U---_S
Electrical Characteristics
A.3.1.14 Erase Verify D-Flash Section (FCMD=0x10)
The time required to Erase Verify D-Flash for a given number of words N_W is given by:
t_d
c
h
e
c
k
≈
(
450
+
N_W
)
⋅
----------¹----------
f _NVMBUS
A.3.1.15 Program D-Flash (FCMD=0x11)
D-Flash programming time is dependent on the number of words being programmed and their location
with respect to a row boundary since programming across a row boundary requires extra steps. The D-
Flash programming time is specified for different cases: 1,2,3,4 words and 4 words across a row boundary.
The typical D-Flash programming time is given by the following equation, where N_W denotes the number
of words; BC=0 if no row boundary is crossed and BC=1 if a row boundary is crossed:
t_dpgm
≈
⎝⎛ ^{( 14}
+
( 54
⋅
N_W)
+
( 14
⋅
BC) )
⋅
f^---_N^---_V^---1-_M^----_O^---_P^-
⎞
⎠
+
⎛
⎝
( 500
+
( 525
⋅
N_W)
+
( 100
⋅
BC))
⋅
f^---_N^---_V^----_M^1----_B^---_U^---_S
⎞
⎠
The maximum D-Flash programming time is given by:
t_dpgm
≈
⎝⎛ ^{( 14}
+
( 54
⋅
N_W)
+
( 14
⋅
BC) )
⋅
---------¹---------
f _NVMOP
⎞
⎠
+
⎝⎛ ^{( 500}
+
( 750
⋅
N_W )
+
( 100
⋅
BC))
⋅
----------¹----------
f _NVMBUS
⎞
⎠
A.3.1.16 Erase D-Flash Sector (FCMD=0x12)
Typical D-Flash sector erase times, expected on a new device where no margin verify fails occur, is given
by:
t_dera
≈
5025
⋅
f^---_N^---_V^---1-_M^----_O^---_P^-
+
700
⋅
----------¹----------
f _NVMBUS
Maximum D-Flash sector erase times is given by:
t_dera
≈
20100
⋅
f^---_N^---_V^---1-_M^----_O^---_P^-
+
3400
⋅
----------¹----------
f _NVMBUS
S12P-Family Reference Manual, Rev. 1.12
Freescale Semiconductor
519