MC9S12P128 Datasheet, PDF (112/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

S12P Memory Map Control (S12PMMCV1)
Global Address [17:0]
Bit17 Bit16 Bit15
Bit8 Bit7
Bit0
DP [15:8]
CPU Address [15:0]
Figure 3-6. DIRECT Address Mapping
Example 3-1. This example demonstrates usage of the Direct Addressing Mode
MOVB
#0x80,DIRECT
;Set DIRECT register to 0x80. Write once only.
;Global data accesses to the range 0xXX_80XX can be direct.
;Logical data accesses to the range 0x80XX are direct.
LDY
<00
;Load the Y index register from 0x8000 (direct access).
;< operator forces direct access on some assemblers but in
;many cases assemblers are “direct page aware” and can
;automatically select direct mode.
3.3.2.3 Program Page Index Register (PPAGE)
Address: 0x0015
7
R
0
W
Reset
0
6
5
4
3
2
0
0
0
PIX3
PIX2
0
0
0
1
1
Figure 3-7. Program Page Index Register (PPAGE)
1
PIX1
1
0
PIX0
0
Read: Anytime
Write: Anytime
These four index bits are used to map 16KB blocks into the Flash page window located in the local (CPU
or BDM) memory map from address 0x8000 to address 0xBFFF (see Figure 3-8). This supports accessing
up to 256 KB of Flash (in the Global map) within the 64KB Local map. The PPAGE index register is
effectively used to construct paged Flash addresses in the Local map format. The CPU has special access
to read and write this register directly during execution of CALL and RTC instructions.
S12P-Family Reference Manual, Rev. 1.12
112
Freescale Semiconductor