MC9S12P128 Datasheet, PDF (134/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Background Debug Module (S12SBDMV1)
5.3 Memory Map and Register Definition
5.3.1 Module Memory Map
Table 5-1 shows the BDM memory map when BDM is active.
Global Address
0x3_FF00–0x3_FF0B
0x3_FF0C–0x3_FF0E
0x3_FF0F
0x3_FF10–0x3_FFFF
Table 5-1. BDM Memory Map
Module
BDM registers
BDM firmware ROM
Family ID (part of BDM firmware ROM)
BDM firmware ROM
Size
(Bytes)
12
3
1
240
5.3.2 Register Descriptions
A summary of the registers associated with the BDM is shown in Figure 5-2. Registers are accessed by
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Global Register
Address Name
Bit 7
6
5
4
3
2
1
Bit 0
0x3_FF00 Reserved R X
X
X
X
X
X
0
0
W
0x3_FF01 BDMSTS R
BDMACT
0
ENBDM
W
SDV
TRACE
0
UNSEC
0
0x3_FF02 Reserved R X
X
X
X
X
X
X
X
W
0x3_FF03 Reserved R X
X
X
X
X
X
X
X
W
0x3_FF04 Reserved R X
X
X
X
X
X
X
X
W
0x3_FF05 Reserved R X
X
X
X
X
X
X
X
W
= Unimplemented, Reserved
= Implemented (do not alter)
X
= Indeterminate
0
Figure 5-2. BDM Register Summary
= Always read zero
S12P-Family Reference Manual, Rev. 1.12
134
Freescale Semiconductor